litex-boards/litex_boards/prog/openocd_max10_blaster2.cfg
Jevin Sweval 9e5224ca49 Add JTAGbone support to Terasic DECA
Along the way I added UARTbone support to DECA as well for debugging.

Examples:

./terasic_deca.py --csr-csv csr.csv --with-jtagbone --build --load
litex_server --jtag --jtag-config ../prog/openocd_max10_blaster2.cfg
litex_term crossover

./terasic_deca.py --csr-csv csr.csv --uart-name jtag_uart --build --load
litex_term --jtag-config ../prog/openocd_max10_blaster2.cfg jtag
2022-01-27 14:13:58 -08:00

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INI

source [find interface/altera-usb-blaster2.cfg]
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME 10m50
}
# user-defined chains are 0xC (12) or 0xE (14)
# they are the same, single, scan-chain disgtinguished by the usr1user bit
jtag newtap $_CHIPNAME tap -irlen 10 -expected-id 0x31810dd -expected-id 0x318a0dd \
-expected-id 0x31820dd -expected-id 0x31830dd -expected-id 0x31840dd \
-expected-id 0x318d0dd -expected-id 0x31850dd -expected-id 0x31010dd \
-expected-id 0x310a0dd -expected-id 0x31020dd -expected-id 0x31030dd \
-expected-id 0x31040dd -expected-id 0x310d0dd -expected-id 0x31050dd
# unneeded
# suppresses warning
gdb_port disabled
tcl_port disabled
telnet_port disabled