litex-boards/litex_boards/community/platforms
2020-01-09 21:56:01 +01:00
..
__init__.py
ac701.py platforms/ac701: set internal vref to 0.750v on DDR3 banks, use IN_TERM=UNTUNED_SPLIT_50 on dq 2020-01-09 21:56:01 +01:00
de1soc.py
de2_115.py
de10lite.py
ecp5_evn.py
pipistrello.py
sp605.py