448 lines
15 KiB
Python
448 lines
15 KiB
Python
#
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# This file is part of LiteX-Boards.
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#
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# Copyright (c) 2020 David Corrigan <davidcorrigan714@gmail.com>
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# Copyright (c) 2020 Alan Green <avg@google.com>
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# SPDX-License-Identifier: BSD-2-Clause
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from litex.build.generic_platform import *
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from litex.build.lattice import LatticeNexusPlatform
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from litex.build.lattice.programmer import LatticeProgrammer
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from litex.build.lattice.programmer import EcpprogProgrammer
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from litex.build.lattice.programmer import OpenOCDJTAGProgrammer
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# IOs ----------------------------------------------------------------------------------------------
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_io = [
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# Section 5.1 Clock sources
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("clk12", 0, Pins("L13"), IOStandard("LVCMOS33")), # Ensure JP2 is installed
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# Clock signal is differential, but we only name the "p" side.
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("clk125", 0, Pins("C12"), IOStandard("LVDS")),
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# 7.2. General Purpose Push Buttons - all logic zero when pressed
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("gsrn", 0, Pins("G19"), IOStandard("LVCMOS33")), # SW4
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("programn", 0, Pins("E11"), IOStandard("LVCMOS33")), # SW5
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("user_btn", 0, Pins("G14"), IOStandard("LVCMOS33")), # SW2
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("user_btn", 1, Pins("G15"), IOStandard("LVCMOS33")), # SW3
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# Section 6.2 UART Topology
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# Requires installation of 0-ohm jumpers R15 and R17 to properly route signals
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# Note that it is R15 and R17, not R16 and R17 as stated in the user guide
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("serial", 0,
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Subsignal("rx", Pins("F16"), IOStandard("LVCMOS33")),
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Subsignal("tx", Pins("F18"), IOStandard("LVCMOS33")),
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),
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# Section 7.3 General Purpose LEDs
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("user_led", 0, Pins("E17"), IOStandard("LVCMOS33")), # Bank 1 Green
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("user_led", 1, Pins("F13"), IOStandard("LVCMOS33")), # Bank 1 Green
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("user_led", 2, Pins("G13"), IOStandard("LVCMOS33")), # Bank 1 Green
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("user_led", 3, Pins("F14"), IOStandard("LVCMOS33")), # Bank 1 Green
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("user_led", 4, Pins("L16"), IOStandard("LVCMOS33")), # Bank 1 Green
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("user_led", 5, Pins("L15"), IOStandard("LVCMOS33")), # Bank 1 Green
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("user_led", 6, Pins("L20"), IOStandard("LVCMOS33")), # Bank 1 Green
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("user_led", 7, Pins("L19"), IOStandard("LVCMOS33")), # Bank 1 Green
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("user_led", 8, Pins("R17"), IOStandard("LVCMOS33")), # Bank 2 Green
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("user_led", 9, Pins("R18"), IOStandard("LVCMOS33")), # Bank 2 Green
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("user_led", 10, Pins("U20"), IOStandard("LVCMOS33")), # Bank 2 Green
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("user_led", 11, Pins("T20"), IOStandard("LVCMOS33")), # Bank 2 Green
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("user_led", 12, Pins("W20"), IOStandard("LVCMOS33")), # Bank 2 Yellow
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("user_led", 13, Pins("V20"), IOStandard("LVCMOS33")), # Bank 2 Yellow
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# Section 7.1 DIP Switch
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("user_dip_btn", 0, Pins("N14"), IOStandard("LVCMOS33")),
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("user_dip_btn", 1, Pins("M14"), IOStandard("LVCMOS33")),
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("user_dip_btn", 2, Pins("M16"), IOStandard("LVCMOS33")),
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("user_dip_btn", 3, Pins("M15"), IOStandard("LVCMOS33")),
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("user_dip_btn", 4, Pins("N15"), IOStandard("LVCMOS33")),
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("user_dip_btn", 5, Pins("N16"), IOStandard("LVCMOS33")),
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("user_dip_btn", 6, Pins("M17"), IOStandard("LVCMOS33")),
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("user_dip_btn", 7, Pins("M18"), IOStandard("LVCMOS33")),
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# Section 6.3.1. SPI Configuration
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("spiflash", 0,
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Subsignal("cs_n", Pins("E13")),
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Subsignal("clk", Pins("E12")),
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Subsignal("mosi", Pins("D13")),
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Subsignal("miso", Pins("D15")),
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Subsignal("wp", Pins("D14")),
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Subsignal("hold", Pins("D16")),
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IOStandard("LVCMOS33")
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),
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("spiflash4x", 0,
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Subsignal("cs_n", Pins("E13")),
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Subsignal("clk", Pins("E12")),
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Subsignal("dq", Pins("D13 D15 D14 D16")),
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IOStandard("LVCMOS33")
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),
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# Section 8.2 Parallel FMC Configuration Connector
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("fmc_config", 0,
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Subsignal("fmc_tck", Pins("P19")), # 3
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Subsignal("ps_por_b", Pins("N19")), # 4
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Subsignal("fmc_tdi", Pins("P20")), # 7
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Subsignal("fmc_prsnt", Pins("N20")), # 8
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Subsignal("fmc_tdo", Pins("P17")), # 9
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Subsignal("fmc_scl", Pins("M20")), # 10
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Subsignal("fmc_tms", Pins("P18")), # 13
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Subsignal("fmc_sda", Pins("M19")), # 14
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IOStandard("LVCMOS33")
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),
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]
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# Connectors ---------------------------------------------------------------------------------------
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_connectors = [
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#TODO ADC
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#TODO D-PHY
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# Section 8.1 FMC LPC Connector
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("FMC", {
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"LA06_P" : "W9", # C10
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"LA06_N" : "Y9", # C11
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"LA10_P" : "W10", # C14
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"LA10_N" : "Y10", # C15
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"LA14_P" : "W11", # C18
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"LA14_N" : "Y11", # C19
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"LA18_CC_P" : "R8", # C22
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"LA18_CC_N" : "T8", # C23
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"LA27_P" : "Y13", # C26
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"LA27_N" : "Y14", # C27
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"LA01_CC_P" : "W13", # D08
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"LA01_CC_N" : "V12", # D09
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"LA05_P" : "R5", # D11
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"LA05_N" : "R6", # D12
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"LA09_P" : "V6", # D14
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"LA09_N" : "U7", # D15
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"LA13_P" : "R9", # D17
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"LA13_N" : "P9", # D18
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"LA17_P" : "U10", # D20
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"LA17_N" : "V10", # D21
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"LA23_P" : "P11", # D23
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"LA23_N" : "R11", # D24
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"LA26_P" : "T13", # D26
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"LA26_N" : "T14", # D27
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"CLK1_P" : "R7", # G02
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"CLK1_N" : "T7", # G03
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"LA00_CC_P" : "V11", # G06
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"LA00_CC_N" : "U11", # G07
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"LA03_P" : "W6", # G09
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"LA03_N" : "Y6", # G10
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"LA08_P" : "Y7", # G12
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"LA08_N" : "Y8", # G13
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"LA12_P" : "U1", # G15
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"LA12_N" : "T1", # G16
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"LA16_P" : "P7", # G18
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"LA16_N" : "P8", # G19
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"LA20_P" : "T10", # G21
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"LA20_N" : "T11", # G22
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"LA22_P" : "V14", # G24
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"LA22_N" : "U14", # G25
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"LA25_P" : "R12", # G27
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"LA25_N" : "P12", # G28
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"LA29_P" : "Y15", # G30
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"LA29_N" : "Y16", # G31
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"LA31_P" : "Y17", # G33
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"LA31_N" : "U16", # G34
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"VREF" : "T6", # H01
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"VREFa" : "Y18", # H01
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"CLK0_P" : "Y12", # H04
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"CLK0_N" : "W12", # H05
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"LA02_P" : "Y2", # H07
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"LA02_N" : "Y3", # H08
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"LA04_P" : "V1", # H10
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"LA04_N" : "W1", # H11
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"LA07_P" : "W7", # H13
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"LA07_N" : "V7", # H14
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"LA11_P" : "P10", # H16
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"LA11_N" : "R10", # H17
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"LA15_P" : "W8", # H19
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"LA15_N" : "V9", # H20
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"LA19_P" : "U12", # H22
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"LA19_N" : "T12", # H23
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"LA21_P" : "P13", # H25
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"LA21_N" : "R13", # H26
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"LA24_P" : "W14", # H28
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"LA24_N" : "W15", # H29
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"LA28_P" : "U15", # H31
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"LA28_N" : "U16", # H32
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"LA30_P" : "V17", # H34
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"LA30_N" : "U16", # H35
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}),
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# Section 8.3 Raspberry Pi Board GPIO Header
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("RASP",
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"None", # (no pin 0)
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"None", # 1 3.3V
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"None", # 2 5V
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"L6", # 3 RASP_IO02
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"None", # 4 5V
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"L5", # 5 RASP_IO03
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"None", # 6 GND
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"M3", # 7 RASP_IO04
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"M2", # 8 RASP_IO14
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"None", # 9 GND
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"L1", # 10 RASP_IO15
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"L2", # 11 RASP_IO17
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"R2", # 12 RASP_IO18
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"R1", # 13 RASP_IO27
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"None", # 14 GND
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"P2", # 15 RASP_IO22
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"P1", # 16 RASP_IO23
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"None", # 17 3.3V
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"K7", # 18 RASP_IO24
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"N4", # 19 RASP_IO10
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"None", # 20 GND
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"K6", # 21 RASP_IO09
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"K5", # 22 RASP_IO25
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"N7", # 23 RASP_IO11
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"P6", # 24 RASP_IO08
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"None", # 25 GND
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"N5", # 26 RASP_IO07
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"M7", # 27 RASP_ID_SD
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"M4", # 28 RASP_ID_SC
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"K8", # 29 RASP_IO05
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"None", # 30 GND
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"L7", # 31 RASP_IO06
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"L8", # 32 RASP_IO12
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"M5", # 33 RASP_IO13
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"None", # 34 GND
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"M6", # 35 RASP_IO19
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"N6", # 36 RASP_IO16
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"P5", # 37 RASP_IO26
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"R3", # 38 RASP_IO20
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"None", # 39 GND
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"R4", # 40 RASP_IO21
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),
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# Section 8.6 PMOD Header
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# PMOD signal number:
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# 1 2 3 4 7 8 9 10
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("PMOD0", "D10 D9 D7 D8 D6 D5 D4 D3"),
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("PMOD1", "E10 E9 E7 E8 E4 E3 E2 F1"),
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("PMOD2", "J2 J1 K2 K1 K3 K4 D17 E18"),
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]
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# Test and Demo ------------------------------------------------------------------------------------
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serial_pmods = [
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("serial_pmod0", 0,
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Subsignal("rx", Pins("PMOD0:0"), IOStandard("LVCMOS33")),
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Subsignal("tx", Pins("PMOD0:1"), IOStandard("LVCMOS33")),
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),
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("serial_pmod1", 0,
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Subsignal("rx", Pins("PMOD1:0"), IOStandard("LVCMOS33")),
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Subsignal("tx", Pins("PMOD1:1"), IOStandard("LVCMOS33")),
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),
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("serial_pmod2", 0,
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Subsignal("rx", Pins("PMOD2:0"), IOStandard("LVCMOS33")),
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Subsignal("tx", Pins("PMOD2:1"), IOStandard("LVCMOS33")),
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),
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]
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# Platform -----------------------------------------------------------------------------------------
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class Platform(LatticeNexusPlatform):
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default_clk_name = "clk12"
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default_clk_period = 1e9/12e6
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def __init__(self, device="LIFCL-40-9BG400C", toolchain="radiant", **kwargs):
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# Accept "LIFCL" for backwards compatibility.
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# LIFCL just means Crosslink-NX so we can expect every
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# Crosslink-NX Evaluation Board to have a LIFCL part.
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if device == "LIFCL":
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device == "LIFCL-40-9BG400C"
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assert device in ["LIFCL-40-9BG400C", "LIFCL-40-8BG400CES"]
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LatticeNexusPlatform.__init__(self, device, _io, _connectors, toolchain=toolchain, **kwargs)
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def request(self, *args, **kwargs):
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import time
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if "serial" in args:
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msg = "FT2232H will be used as serial, make sure that:\n"
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msg += " -the hardware has been modified: R18 and R19 should be removed, two 0 Ω resistors shoud be populated on R15 (and not R16) and R17.\n"
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msg += " -the chip is configured as UART with virtual COM on port B (With FTProg or https://github.com/trabucayre/fixFT2232_ecp5evn)."
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print(msg)
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time.sleep(2)
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return LatticeNexusPlatform.request(self, *args, **kwargs)
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def create_programmer(self, mode = "direct", prog="radiant"):
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assert mode in ["direct","flash"]
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assert prog in ["radiant","ecpprog","openocd"]
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if prog == "ecpprog":
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return EcpprogProgrammer()
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if prog == "openocd":
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return OpenOCDJTAGProgrammer("openocd_evn_nx.cfg")
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xcf_template_direct = """<?xml version='1.0' encoding='utf-8' ?>
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<!DOCTYPE ispXCF SYSTEM "IspXCF.dtd" >
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<ispXCF version="R1.2.0">
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<Comment></Comment>
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<Chain>
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<Comm>JTAG</Comm>
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<Device>
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<SelectedProg value="TRUE"/>
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<Pos>1</Pos>
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<Vendor>Lattice</Vendor>
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<Family>LIFCL</Family>
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<Name>LIFCL-40</Name>
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<IDCode>0x010f1043</IDCode>
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<Package>All</Package>
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<PON>LIFCL-40</PON>
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<Bypass>
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<InstrLen>8</InstrLen>
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<InstrVal>11111111</InstrVal>
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<BScanLen>1</BScanLen>
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<BScanVal>0</BScanVal>
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</Bypass>
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<File>{bitstream_file}</File>
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<JedecChecksum>N/A</JedecChecksum>
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<MemoryType>Static Random Access Memory (SRAM)</MemoryType>
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<Operation>Fast Configuration</Operation>
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<Option>
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<SVFVendor>JTAG STANDARD</SVFVendor>
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<IOState>HighZ</IOState>
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<PreloadLength>362</PreloadLength>
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<IOVectorData>0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF</IOVectorData>
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<Usercode>0x00000000</Usercode>
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<AccessMode>Direct Programming</AccessMode>
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</Option>
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</Device>
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</Chain>
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<ProjectOptions>
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<Program>SEQUENTIAL</Program>
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<Process>ENTIRED CHAIN</Process>
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<OperationOverride>No Override</OperationOverride>
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<StartTAP>TLR</StartTAP>
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<EndTAP>TLR</EndTAP>
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<VerifyUsercode value="FALSE"/>
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<TCKDelay>3</TCKDelay>
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</ProjectOptions>
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<CableOptions>
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<CableName>USB2</CableName>
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<PortAdd>FTUSB-0</PortAdd>
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</CableOptions>
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</ispXCF>
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"""
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xcf_template_flash = """<?xml version='1.0' encoding='utf-8' ?>
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<!DOCTYPE ispXCF SYSTEM "IspXCF.dtd" >
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<ispXCF version="R1.2.0">
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<Comment></Comment>
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<Chain>
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<Comm>JTAG2SPI</Comm>
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<Device>
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<SelectedProg value="TRUE"/>
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<Pos>1</Pos>
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<Vendor>Lattice</Vendor>
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<Family>LIFCL</Family>
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<Name>LIFCL-40</Name>
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<Package>All</Package>
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<Bypass>
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<InstrLen>8</InstrLen>
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<InstrVal>11111111</InstrVal>
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<BScanLen>1</BScanLen>
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<BScanVal>0</BScanVal>
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</Bypass>
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<File>{bitstream_file}</File>
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<MemoryType>External SPI Flash Memory (SPI FLASH)</MemoryType>
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<Operation>Erase,Program,Verify</Operation>
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<Option>
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<SVFVendor>JTAG STANDARD</SVFVendor>
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<Usercode>0x00000000</Usercode>
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<AccessMode>Direct Programming</AccessMode>
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</Option>
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<FPGALoader>
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<CPLDDevice>
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<Device>
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<Pos>1</Pos>
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<Vendor>Lattice</Vendor>
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<Family>LIFCL</Family>
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<Name>LIFCL-40</Name>
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<IDCode>0x010f1043</IDCode>
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<Package>All</Package>
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<PON>LIFCL-40</PON>
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<Bypass>
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<InstrLen>8</InstrLen>
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<InstrVal>11111111</InstrVal>
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<BScanLen>1</BScanLen>
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<BScanVal>0</BScanVal>
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</Bypass>
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<MemoryType>Static Random Access Memory (SRAM)</MemoryType>
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<Operation>Refresh Verify ID</Operation>
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<Option>
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<SVFVendor>JTAG STANDARD</SVFVendor>
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<IOState>HighZ</IOState>
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<PreloadLength>362</PreloadLength>
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<IOVectorData>0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF</IOVectorData>
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<AccessMode>Direct Programming</AccessMode>
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</Option>
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</Device>
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</CPLDDevice>
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<FlashDevice>
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<Device>
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<Pos>1</Pos>
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<Vendor>Macronix</Vendor>
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<Family>SPI Serial Flash</Family>
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<Name>MX25L12833F</Name>
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<IDCode>0x18</IDCode>
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<Package>8-pin SOP</Package>
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<Operation>Erase,Program,Verify</Operation>
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<File>{bitstream_file}</File>
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<AddressBase>0x00000000</AddressBase>
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<EndAddress>0x000F0000</EndAddress>
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<DeviceSize>128</DeviceSize>
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<DataSize>1016029</DataSize>
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<NumberOfDevices>1</NumberOfDevices>
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<ReInitialize value="FALSE"/>
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</Device>
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</FlashDevice>
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<FPGADevice>
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<Device>
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<Pos>1</Pos>
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<Name></Name>
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<File>{bitstream_file}</File>
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<LocalChainList>
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<LocalDevice index="-99"
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name="Unknown"
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file="{bitstream_file}"/>
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</LocalChainList>
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<Option>
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<SVFVendor>JTAG STANDARD</SVFVendor>
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</Option>
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</Device>
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</FPGADevice>
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</FPGALoader>
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</Device>
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</Chain>
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<ProjectOptions>
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<Program>SEQUENTIAL</Program>
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<Process>ENTIRED CHAIN</Process>
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<OperationOverride>No Override</OperationOverride>
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<StartTAP>TLR</StartTAP>
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<EndTAP>TLR</EndTAP>
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<DisableCheckBoard value="TRUE"/>
|
|
<VerifyUsercode value="FALSE"/>
|
|
<TCKDelay>3</TCKDelay>
|
|
</ProjectOptions>
|
|
<CableOptions>
|
|
<CableName>USB2</CableName>
|
|
<PortAdd>FTUSB-0</PortAdd>
|
|
<USBID>Lattice CrossLink-NX Eval Board A Location 0000 Serial FT4J4IK9A</USBID>
|
|
</CableOptions>
|
|
</ispXCF>
|
|
"""
|
|
|
|
if mode == "direct":
|
|
xcf_template = xcf_template_direct
|
|
if mode == "flash":
|
|
xcf_template = xcf_template_flash
|
|
|
|
return LatticeProgrammer(xcf_template)
|