187 lines
8.4 KiB
Python
Executable File
187 lines
8.4 KiB
Python
Executable File
#!/usr/bin/env python3
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#
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# This file is part of LiteX-Boards.
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#
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# Copyright (c) 2020 Shinken Sanada <sanadashinken@gmail.com>
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# SPDX-License-Identifier: BSD-2-Clause
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from migen import *
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from litex.gen import *
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from litex_boards.platforms import qmtech_wukong
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from litex.soc.cores.clock import *
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from litex.soc.integration.soc_core import *
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from litex.soc.integration.builder import *
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from litex.soc.cores.video import VideoS7HDMIPHY
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from litex.soc.cores.video import video_timings
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from litex.soc.cores.led import LedChaser
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from litex.soc.cores.gpio import GPIOIn
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from litedram.modules import MT41K128M16
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from litedram.phy import s7ddrphy
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from liteeth.phy import LiteEthPHY
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from liteeth.phy import LiteEthPHYMII
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# CRG ----------------------------------------------------------------------------------------------
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class _CRG(LiteXModule):
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def __init__(self, platform, speed_grade, sys_clk_freq, with_video_pll=False, pix_clk=25.175e6):
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self.rst = Signal()
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self.cd_sys = ClockDomain()
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self.cd_sys4x = ClockDomain()
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self.cd_sys4x_dqs = ClockDomain()
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self.cd_idelay = ClockDomain()
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self.cd_clk100 = ClockDomain()
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self.cd_hdmi = ClockDomain()
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self.cd_hdmi5x = ClockDomain()
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# # #
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# Clk/Rst.
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clk50 = platform.request("clk50")
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rst_n = platform.request("cpu_reset")
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# Main PLL.
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self.pll = pll = S7MMCM(speedgrade=speed_grade)
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self.comb += pll.reset.eq(~rst_n | self.rst)
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pll.register_clkin(clk50, 50e6)
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pll.create_clkout(self.cd_sys, sys_clk_freq)
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pll.create_clkout(self.cd_sys4x, 4*sys_clk_freq)
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pll.create_clkout(self.cd_sys4x_dqs, 4*sys_clk_freq, phase=90)
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# IDelay PLL.
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self.pll_idelay = pll_idelay = S7PLL(speedgrade=speed_grade)
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self.comb += pll_idelay.reset.eq(~rst_n | self.rst)
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pll_idelay.register_clkin(clk50, 50e6)
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pll_idelay.create_clkout(self.cd_idelay, 200e6)
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pll_idelay.create_clkout(self.cd_clk100, 100e6)
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# IDelayCtrl.
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self.idelayctrl = S7IDELAYCTRL(self.cd_idelay)
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# Video PLL.
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if with_video_pll:
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self.video_pll = video_pll = S7MMCM(speedgrade=speed_grade)
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self.comb += video_pll.reset.eq(~rst_n | self.rst)
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video_pll.register_clkin(clk50, 50e6)
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video_pll.create_clkout(self.cd_hdmi, pix_clk)
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video_pll.create_clkout(self.cd_hdmi5x, 5*pix_clk)
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# BaseSoC ------------------------------------------------------------------------------------------
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class BaseSoC(SoCCore):
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def __init__(self, sys_clk_freq=100e6, revision=1, speedgrade=-2,
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with_ethernet = False,
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with_etherbone = False,
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eth_ip = "192.168.1.50",
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remote_ip = None,
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with_led_chaser = True,
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with_video_terminal = False,
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with_video_framebuffer = False,
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video_timing = "640x480@60Hz",
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**kwargs):
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platform = qmtech_wukong.Platform(revision=revision,speedgrade=speedgrade)
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# CRG --------------------------------------------------------------------------------------
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with_video_pll = (with_video_terminal or with_video_framebuffer)
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self.crg = _CRG(platform, speedgrade, sys_clk_freq,
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with_video_pll = with_video_pll,
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pix_clk = video_timings[video_timing]["pix_clk"]
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)
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# SoCCore ----------------------------------------------------------------------------------
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SoCCore.__init__(self, platform, sys_clk_freq, ident=f"LiteX SoC on QMTECH Wukong Board V{revision}", **kwargs)
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# DDR3 SDRAM -------------------------------------------------------------------------------
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if not self.integrated_main_ram_size:
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self.ddrphy = s7ddrphy.A7DDRPHY(platform.request("ddram"),
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memtype = "DDR3",
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nphases = 4,
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sys_clk_freq = sys_clk_freq)
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self.add_sdram("sdram",
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phy = self.ddrphy,
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module = MT41K128M16(sys_clk_freq, "1:4"),
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l2_cache_size = kwargs.get("l2_size", 8192)
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)
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# Ethernet / Etherbone ---------------------------------------------------------------------
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if with_ethernet or with_etherbone:
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self.ethphy = LiteEthPHY(
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clock_pads = self.platform.request("eth_clocks"),
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pads = self.platform.request("eth"),
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clk_freq = sys_clk_freq)
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if with_ethernet:
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self.add_ethernet(phy=self.ethphy, nrxslots=2, local_ip=eth_ip, remote_ip=remote_ip)
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if with_etherbone:
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self.add_etherbone(phy=self.ethphy, ip_address=eth_ip)
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# Leds -------------------------------------------------------------------------------------
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if with_led_chaser:
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self.leds = LedChaser(
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pads = platform.request_all("user_led"),
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sys_clk_freq = sys_clk_freq)
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# Video ----------------------------------- -------------------------------------------------
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if with_video_terminal or with_video_framebuffer:
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self.videophy = VideoS7HDMIPHY(platform.request("hdmi_out"), clock_domain="hdmi")
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if with_video_terminal:
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self.add_video_terminal(phy=self.videophy, timings=video_timing, clock_domain="hdmi")
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if with_video_framebuffer:
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self.add_video_framebuffer(phy=self.videophy, timings=video_timing, clock_domain="hdmi")
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# Build --------------------------------------------------------------------------------------------
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def main():
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from litex.build.parser import LiteXArgumentParser
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parser = LiteXArgumentParser(platform=qmtech_wukong.Platform, description="LiteX SoC on QMTECH Wukong Board.")
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parser.add_target_argument("--sys-clk-freq", default=100e6, type=float, help="System clock frequency.")
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parser.add_target_argument("--revision", default=1, help="Board version (1 , 2 or 3).")
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parser.add_target_argument("--speedgrade", default=-1, type=int, help="FPGA speedgrade (-1 or -2).")
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ethopts = parser.target_group.add_mutually_exclusive_group()
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ethopts.add_argument("--with-ethernet", action="store_true", help="Enable Ethernet support.")
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ethopts.add_argument("--with-etherbone", action="store_true", help="Enable Etherbone support.")
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parser.add_target_argument("--eth-ip", default="192.168.1.50", help="Ethernet/Etherbone IP address.")
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parser.add_target_argument("--remote-ip", default="192.168.1.100", help="Remote IP address of TFTP server.")
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sdopts = parser.target_group.add_mutually_exclusive_group()
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sdopts.add_argument("--with-spi-sdcard", action="store_true", help="Enable SPI-mode SDCard support.")
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sdopts.add_argument("--with-sdcard", action="store_true", help="Enable SDCard support.")
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viopts = parser.target_group.add_mutually_exclusive_group()
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viopts.add_argument("--with-video-terminal", action="store_true", help="Enable Video Terminal (HDMI).")
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viopts.add_argument("--with-video-framebuffer", action="store_true", help="Enable Video Framebuffer (HDMI).")
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args = parser.parse_args()
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soc = BaseSoC(
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sys_clk_freq = args.sys_clk_freq,
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revision = int(args.revision),
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speedgrade = args.speedgrade,
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with_ethernet = args.with_ethernet,
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with_etherbone = args.with_etherbone,
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eth_ip = args.eth_ip,
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remote_ip = args.remote_ip,
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with_video_terminal = args.with_video_terminal,
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with_video_framebuffer = args.with_video_framebuffer,
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**parser.soc_argdict
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)
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if args.with_spi_sdcard:
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soc.platform.add_extension(qmtech_wukong._sdcard_pmod_io)
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soc.add_spi_sdcard()
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if args.with_sdcard:
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if int(args.revision) == 1:
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soc.platform.add_extension(qmtech_wukong._sdcard_pmod_io)
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soc.add_sdcard()
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builder = Builder(soc, **parser.builder_argdict)
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if args.build:
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builder.build(**parser.toolchain_argdict)
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if args.load:
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prog = soc.platform.create_programmer()
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prog.load_bitstream(builder.get_bitstream_filename(mode="sram"))
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if __name__ == "__main__":
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main()
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