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litex-boards/litex_boards
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lapd d950b3feb5 Use built-int RS232 port 
Signed-off-by: lapd <lapd@soc.one>
2021-11-03 22:50:40 +07:00
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platforms Use built-int RS232 port 2021-11-03 22:50:40 +07:00
prog prog/openocd_butterstick: Set _CHIPNAME to ecp5 (for jtag_uart/jtag_bone). 2021-10-27 17:27:07 +02:00
targets ego1: Switch to VideoTerminal (LiteVideo is no longer provided by default with LiteX). 2021-10-27 16:29:46 +02:00
tools
__init__.py Add initial RZ-EasyFPGA support! (#270) 2021-09-21 09:55:22 +02:00