146 lines
5.1 KiB
Python
146 lines
5.1 KiB
Python
# This file is Copyright (c) 2020 Paul Sajna <sajattack@gmail.com>
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# License: BSD
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from litex.build.generic_platform import *
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from litex.build.altera import AlteraPlatform
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from litex.build.altera.programmer import USBBlaster
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# IOs ----------------------------------------------------------------------------------------------
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_io = [
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("clk50", 0, Pins("V11"), IOStandard("3.3-V LVTTL")),
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("clk50", 1, Pins("Y13"), IOStandard("3.3-V LVTTL")),
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("clk50", 2, Pins("E11"), IOStandard("3.3-V LVTTL")),
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("user_led", 0, Pins("W15"), IOStandard("3.3-V LVTTL")),
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("user_led", 1, Pins("AA24"), IOStandard("3.3-V LVTTL")),
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("user_led", 2, Pins("V16"), IOStandard("3.3-V LVTTL")),
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("user_led", 3, Pins("V15"), IOStandard("3.3-V LVTTL")),
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("user_led", 4, Pins("AF26"), IOStandard("3.3-V LVTTL")),
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("user_led", 5, Pins("AE26"), IOStandard("3.3-V LVTTL")),
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("user_led", 6, Pins("Y16"), IOStandard("3.3-V LVTTL")),
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("user_led", 7, Pins("AA23"), IOStandard("3.3-V LVTTL")),
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("key", 0, Pins("AH17"), IOStandard("3.3-V LVTTL")),
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("key", 1, Pins("AH16"), IOStandard("3.3-V LVTTL")),
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("user_sw", 0, Pins("Y24"), IOStandard("3.3-V LVTTL")),
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("user_sw", 1, Pins("W24"), IOStandard("3.3-V LVTTL")),
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("user_sw", 2, Pins("W21"), IOStandard("3.3-V LVTTL")),
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("user_sw", 3, Pins("W20"), IOStandard("3.3-V LVTTL")),
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("serial", 0,
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Subsignal("tx", Pins("AH9"), IOStandard("3.3-V LVTTL")), # User I/O port on Mister
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Subsignal("rx", Pins("AG11"), IOStandard("3.3-V LVTTL")) # User I/O port on Mister
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),
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("serial", 1,
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Subsignal("tx", Pins("AF13"), IOStandard("3.3-V LVTTL")), # Arduino_IO1
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Subsignal("rx", Pins("AG13"), IOStandard("3.3-V LVTTL")) # Arduino_IO0
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),
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("g_sensor", 0,
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Subsignal("int", Pins("A17")),
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Subsignal("sclk", Pins("C18")),
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Subsignal("sdat", Pins("A19")),
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IOStandard("3.3-V LVTTL")
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),
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("adc", 0,
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Subsignal("convst", Pins("U9")),
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Subsignal("sclk", Pins("V10")),
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Subsignal("sdi", Pins("AC4")),
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Subsignal("sdo", Pins("AD4")),
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IOStandard("3.3-V LVTTL")
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),
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("hdmi", 0,
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Subsignal("tx_d_r", Pins("AS12 AE12 W8 Y8 AD11 AD10 AE11 Y5")),
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Subsignal("tx_d_g", Pins("AF10 Y4 AE9 AB4 AE7 AF6 AF8 AF5")),
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Subsignal("tx_d_b", Pins("AE4 AH2 AH4 AH5 AH6 AG6 AF9 AE8")),
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Subsignal("tx_clk", Pins("AG5")),
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Subsignal("tx_de", Pins("AD19")),
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Subsignal("tx_hs", Pins("T8")),
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Subsignal("tx_vs", Pins("V13")),
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Subsignal("tx_int", Pins("AF11")),
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IOStandard("3.3-V LVTTL")
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),
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("i2c", 0,
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Subsignal("scl", Pins("U10")),
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Subsignal("sda", Pins("AA4")),
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IOStandard("3.3-V LVTTL")
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),
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("i2s", 0,
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Subsignal("i2s", Pins("T13")),
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Subsignal("mclk", Pins("U11")),
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Subsignal("lrclk", Pins("T11")),
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Subsignal("sclk", Pins("T12")),
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IOStandard("3.3-V LVTTL")
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),
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]
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_mister_sdram_module_io = [
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("sdram_clock", 0, Pins("AD20"), IOStandard("3.3-V LVTTL")),
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("sdram", 0,
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Subsignal("cke", Pins("AG10")),
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Subsignal("a", Pins(
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"Y11 AA26 AA13 AA11 W11 Y19 AB23 AC23",
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"AC22 C12 AB26 AD17 D12")),
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Subsignal("dq", Pins(
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"E8 V12 D11 W12 AH13 D8 AH14 AF7",
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"AE24 AD23 AE6 AE23 AG14 AD5 AF4 AH3")),
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Subsignal("ba", Pins("Y17 AB25")),
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Subsignal("cas_n", Pins("AA18")),
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Subsignal("cs_n", Pins("Y18")),
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Subsignal("ras_n", Pins("W14")),
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Subsignal("we_n", Pins("AA19")),
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IOStandard("3.3-V LVTTL")
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),
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("spisdcard", 0,
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Subsignal("clk", Pins("AH26")),
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Subsignal("mosi", Pins("AF27")),
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Subsignal("cs_n", Pins("AF28")),
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Subsignal("miso", Pins("AF25")),
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IOStandard("3.3-V LVTTL")
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),
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("mister_outputs", 0,
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Subsignal("led_user", Pins("Y15")),
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Subsignal("led_hdd", Pins("AA15")),
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Subsignal("led_power", Pins("AG28")),
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IOStandard("3.3-V LVTTL")
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),
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("vga", 0,
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Subsignal("red", Pins("AE17 AE20 AF20 AH18 AH19 AF21")),
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Subsignal("green", Pins("AE19 AG15 AF18 AG18 AG19 AG20")),
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Subsignal("blue", Pins("AG21 AA20 AE22 AF22 AH23 AH21")),
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Subsignal("hsync", Pins("AH22")),
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Subsignal("vsync", Pins("AG24")),
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Subsignal("en", Pins("AH27")),
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IOStandard("3.3-V LVTTL")
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),
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]
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# Platform -----------------------------------------------------------------------------------------
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class Platform(AlteraPlatform):
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default_clk_name = "clk50"
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default_clk_period = 1e9/50e6
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def __init__(self):
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AlteraPlatform.__init__(self, "5CSEBA6U23I7", _io)
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self.add_extension(_mister_sdram_module_io)
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def create_programmer(self):
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return USBBlaster()
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def do_finalize(self, fragment):
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AlteraPlatform.do_finalize(self, fragment)
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self.add_period_constraint(self.lookup_request("clk50", 0, loose=True), 1e9/50e6)
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self.add_period_constraint(self.lookup_request("clk50", 1, loose=True), 1e9/50e6)
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self.add_period_constraint(self.lookup_request("clk50", 2, loose=True), 1e9/50e6)
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