dc92584681
Even though the schematic and bom call for speedgrade 1, this was only for the prototypes. All productions units have been updated to speedgrade 2. See this thread: https://ez.analog.com/fpga/f/q-a/112356/adrv9009-zu11eg-speed-grade And the official HDL project for the board: https://github.com/analogdevicesinc/hdl/blob/master/projects/adrv9009zu11eg/adrv2crr_fmc/system_project.tcl#L16 Signed-off-by: Sylvain Munaut <tnt@246tNt.com> |
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