2013-11-29 03:43:44 -05:00
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import warnings
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2013-05-22 11:11:09 -04:00
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from migen.fhdl.std import *
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2013-07-25 12:52:54 -04:00
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from migen.fhdl.structure import _Fragment
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2012-03-05 14:31:41 -05:00
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from migen.fhdl import verilog
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from migen.sim.ipc import *
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2013-02-09 11:04:53 -05:00
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from migen.sim import icarus
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2012-03-05 14:31:41 -05:00
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2015-04-13 14:45:35 -04:00
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2012-03-05 14:31:41 -05:00
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class TopLevel:
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2015-04-13 14:07:07 -04:00
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def __init__(self, vcd_name=None, vcd_level=1,
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top_name="top", dut_type="dut", dut_name="dut",
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cd_name="sys", clk_period=10):
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self.vcd_name = vcd_name
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self.vcd_level = vcd_level
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self.top_name = top_name
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self.dut_type = dut_type
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self.dut_name = dut_name
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2014-10-17 05:08:37 -04:00
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2015-04-13 14:07:07 -04:00
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self._cd_name = cd_name
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self._clk_period = clk_period
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2014-10-17 05:08:37 -04:00
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2015-04-13 14:07:07 -04:00
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cd = ClockDomain(self._cd_name)
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self.clock_domains = [cd]
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self.ios = {cd.clk, cd.rst}
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2014-10-17 05:08:37 -04:00
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2015-04-13 14:07:07 -04:00
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def get(self, sockaddr):
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template1 = """`timescale 1ns / 1ps
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2012-03-06 09:26:04 -05:00
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module {top_name}();
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2012-03-05 14:31:41 -05:00
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reg {clk_name};
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reg {rst_name};
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initial begin
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{rst_name} <= 1'b1;
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@(posedge {clk_name});
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{rst_name} <= 1'b0;
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end
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always begin
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{clk_name} <= 1'b0;
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#{hclk_period};
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{clk_name} <= 1'b1;
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#{hclk_period};
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2012-03-05 14:31:41 -05:00
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end
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{dut_type} {dut_name}(
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.{rst_name}({rst_name}),
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.{clk_name}({clk_name})
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);
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initial $migensim_connect("{sockaddr}");
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always @(posedge {clk_name}) $migensim_tick;
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"""
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template2 = """
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initial begin
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$dumpfile("{vcd_name}");
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$dumpvars({vcd_level}, {dut_name});
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end
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"""
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r = template1.format(top_name=self.top_name,
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dut_type=self.dut_type,
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dut_name=self.dut_name,
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clk_name=self._cd_name + "_clk",
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rst_name=self._cd_name + "_rst",
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hclk_period=str(self._clk_period/2),
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sockaddr=sockaddr)
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if self.vcd_name is not None:
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r += template2.format(vcd_name=self.vcd_name,
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vcd_level=str(self.vcd_level),
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dut_name=self.dut_name)
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r += "\nendmodule"
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return r
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2012-03-05 14:31:41 -05:00
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2015-04-13 14:45:35 -04:00
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2012-03-05 14:31:41 -05:00
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class Simulator:
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def __init__(self, fragment, top_level=None, sim_runner=None, sockaddr="simsocket", **vopts):
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if not isinstance(fragment, _Fragment):
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fragment = fragment.get_fragment()
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if top_level is None:
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top_level = TopLevel()
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if sim_runner is None:
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sim_runner = icarus.Runner()
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self.top_level = top_level
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self.ipc = Initiator(sockaddr)
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self.sim_runner = sim_runner
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c_top = self.top_level.get(sockaddr)
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fragment = fragment + _Fragment(clock_domains=top_level.clock_domains)
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c_fragment = verilog.convert(fragment,
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ios=self.top_level.ios,
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name=self.top_level.dut_type,
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**vopts)
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self.namespace = c_fragment.ns
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self.cycle_counter = -1
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self.sim_runner = sim_runner
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self.sim_runner.start(c_top, c_fragment)
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self.ipc.accept()
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reply = self.ipc.recv()
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assert(isinstance(reply, MessageTick))
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self.sim_functions = fragment.sim
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self.active_sim_functions = set(f for f in fragment.sim if not hasattr(f, "passive") or not f.passive)
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self.unreferenced = {}
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def run(self, ncycles=None):
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counter = 0
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if self.active_sim_functions:
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if ncycles is None:
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def continue_simulation():
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return bool(self.active_sim_functions)
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else:
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def continue_simulation():
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return self.active_sim_functions and counter < ncycles
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else:
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if ncycles is None:
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raise ValueError("No active simulation function present - must specify ncycles to end simulation")
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def continue_simulation():
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return counter < ncycles
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while continue_simulation():
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self.cycle_counter += 1
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counter += 1
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self.ipc.send(MessageGo())
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reply = self.ipc.recv()
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assert(isinstance(reply, MessageTick))
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del_list = []
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for s in self.sim_functions:
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try:
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s(self)
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except StopSimulation:
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del_list.append(s)
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for s in del_list:
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self.sim_functions.remove(s)
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try:
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self.active_sim_functions.remove(s)
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except KeyError:
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pass
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def get_unreferenced(self, item, index):
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try:
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return self.unreferenced[(item, index)]
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except KeyError:
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if isinstance(item, Memory):
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try:
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init = item.init[index]
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except (TypeError, IndexError):
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init = 0
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else:
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init = item.reset
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self.unreferenced[(item, index)] = init
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return init
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def rd(self, item, index=0):
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try:
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name = self.top_level.top_name + "." \
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+ self.top_level.dut_name + "." \
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+ self.namespace.get_name(item)
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self.ipc.send(MessageRead(name, Int32(index)))
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reply = self.ipc.recv()
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assert(isinstance(reply, MessageReadReply))
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value = reply.value
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except KeyError:
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value = self.get_unreferenced(item, index)
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if isinstance(item, Memory):
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signed = False
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nbits = item.width
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else:
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signed = item.signed
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nbits = flen(item)
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value = value & (2**nbits - 1)
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if signed and (value & 2**(nbits - 1)):
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value -= 2**nbits
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return value
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def wr(self, item, value, index=0):
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if isinstance(item, Memory):
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nbits = item.width
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else:
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nbits = flen(item)
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if value < 0:
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value += 2**nbits
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assert(value >= 0 and value < 2**nbits)
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try:
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name = self.top_level.top_name + "." \
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+ self.top_level.dut_name + "." \
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+ self.namespace.get_name(item)
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self.ipc.send(MessageWrite(name, Int32(index), value))
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except KeyError:
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self.unreferenced[(item, index)] = value
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def __del__(self):
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if hasattr(self, "ipc"):
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warnings.warn("call Simulator.close() to clean up "
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"or use it as a contextmanager", DeprecationWarning)
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self.close()
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def close(self):
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self.ipc.close()
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self.sim_runner.close()
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del self.ipc
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del self.sim_runner
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def __enter__(self):
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return self
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def __exit__(self, type, value, traceback):
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self.close()
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2013-11-29 03:43:44 -05:00
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2015-04-13 14:45:35 -04:00
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2014-07-24 08:31:00 -04:00
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def run_simulation(fragment, ncycles=None, vcd_name=None, **kwargs):
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with Simulator(fragment, TopLevel(vcd_name), icarus.Runner(**kwargs)) as s:
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s.run(ncycles)
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