37 lines
812 B
Tcl
37 lines
812 B
Tcl
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set HDL_TOOLTYPE SYNTHESIS
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set HDL_TOOLNAME synplify
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set HDL_PUTS puts
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set HDL_MSG_FORMAT "********** %s **********"
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proc hdl_tool_library {lib_list} {
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}
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proc hdl_tool_compile {format version incdirs library define files behavioral} {
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if {[llength $define]} {
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error "-define not yet supported"
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}
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switch $format {
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"vhdl" {
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foreach f $files {
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add_file -vhdl -lib $library $f
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}
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}
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"verilog" {
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foreach i $incdirs {
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set_option -include_path "$i"
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}
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foreach f $files {
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add_file -verilog $f
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}
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}
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"ngc" {
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foreach i $incdirs {
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set_option -include_path "$i"
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}
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foreach f $files {
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add_file -xilinx $f
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}
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}
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}
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}
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