litex/misoclib/mem/litesata/frontend/common.py

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from misoclib.mem.litesata.common import *
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class LiteSATAMasterPort:
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def __init__(self, dw):
self.source = Source(command_tx_description(dw))
self.sink = Sink(command_rx_description(dw))
def connect(self, slave):
return [
Record.connect(self.source, slave.sink),
Record.connect(slave.source, self.sink)
]
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class LiteSATASlavePort:
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def __init__(self, dw):
self.sink = Sink(command_tx_description(dw))
self.source = Source(command_rx_description(dw))
def connect(self, master):
return [
Record.connect(self.sink, master.source),
Record.connect(master.sink, self.source)
]
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class LiteSATAUserPort(LiteSATASlavePort):
def __init__(self, dw):
LiteSATASlavePort.__init__(self, dw)