2013-12-01 21:30:49 -05:00
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import copy
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import json
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from migen.fhdl.std import *
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from migen.genlib.cordic import Cordic
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2013-12-02 07:03:26 -05:00
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from mibuild.tools import mkdir_noerror
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2013-12-01 21:30:49 -05:00
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from mibuild.generic_platform import *
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from mibuild.xilinx_ise import XilinxISEPlatform, CRG_SE
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class CordicImpl(Module):
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def __init__(self, name, **kwargs):
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self.name = name
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2013-12-02 07:03:26 -05:00
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mkdir_noerror("build")
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2013-12-01 21:30:49 -05:00
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json.dump(kwargs, open("build/{}.json".format(name), "w"))
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self.platform = platform = Platform()
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self.submodules.cordic = Cordic(**kwargs)
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width = flen(self.cordic.xi)
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self.comb += self.cordic.xi.eq(
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int((1<<width - 1)/self.cordic.gain*.98))
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self.comb += self.cordic.yi.eq(0)
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zi = self.cordic.zi
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self.sync += zi.eq(zi + 1)
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do = platform.request("do")
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self.sync += do.eq(Cat(self.cordic.xo, self.cordic.yo))
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def build(self):
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self.platform.build(self, build_name=self.name)
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class Platform(XilinxISEPlatform):
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_io = [
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("clk", 0, Pins("AB13")),
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("rst", 0, Pins("V5")),
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("do", 0,
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Pins("Y2 W3 W1 P8 P7 P6 P5 T4 T3",
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"U4 V3 N6 N7 M7 M8 R4 P4 M6 L6 P3 N4",
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"M5 V2 V1 U3 U1 T2 T1 R3 R1 P2 P1"),
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),
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]
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def __init__(self):
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XilinxISEPlatform.__init__(self, "xc6slx45-fgg484-2", self._io,
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lambda p: CRG_SE(p, "clk", "rst", 10.))
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if __name__ == "__main__":
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default = dict(width=16, guard=0, eval_mode="pipelined",
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func_mode="circular", cordic_mode="rotate")
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variations = dict(
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eval_mode=["combinatorial", "pipelined", "iterative"],
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width=[4, 8, 12, 14, 16, 20, 24, 32],
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stages=[10, 12, 14, 16, 20, 24, 32],
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guard=[0, 1, 2, 3, 4],
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)
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CordicImpl("cordic_test", eval_mode="combinatorial").build()
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name = "cordic_baseline"
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CordicImpl(name, **default).build()
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for k, v in sorted(variations.items()):
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for vi in v:
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name = "cordic_{}_{}".format(k, vi)
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kw = copy.copy(default)
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kw[k] = vi
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CordicImpl(name, **kw).build()
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