2021-10-24 06:08:58 -04:00
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#
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# This file is part of LiteX.
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#
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# Copyright (c) 2021 Navaneeth Bhardwaj <navan93@gmail.com>
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# SPDX-License-Identifier: BSD-2-Clause
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import unittest
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import pexpect
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import sys
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class TestCPU(unittest.TestCase):
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2021-10-26 10:37:38 -04:00
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def boot_test(self, cpu_type, cpu_variant="standard"):
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cmd = f'litex_sim --cpu-type={cpu_type} --cpu-variant={cpu_variant}'
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2021-10-24 06:08:58 -04:00
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litex_prompt = [b'\033\[[0-9;]+mlitex\033\[[0-9;]+m>']
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is_success = True
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with open("/tmp/test_boot_log", "wb") as result_file:
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p = pexpect.spawn(cmd, timeout=None, logfile=result_file)
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try:
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match_id = p.expect(litex_prompt, timeout=1200)
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except pexpect.EOF:
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print('\n*** Premature termination')
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is_success = False
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except pexpect.TIMEOUT:
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print('\n*** Timeout ')
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is_success = False
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if not is_success:
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print(f'*** {cpu_type} Boot Failure')
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with open("/tmp/test_boot_log", "r") as result_file:
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print(result_file.read())
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else:
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p.terminate(force=True)
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print(f'*** {cpu_type} Boot Success')
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return is_success
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2021-10-26 09:36:07 -04:00
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# RISC-V CPUs.
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2021-10-24 06:08:58 -04:00
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def test_vexriscv(self):
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self.assertTrue(self.boot_test("vexriscv"))
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def test_vexriscv_smp(self):
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self.assertTrue(self.boot_test("vexriscv_smp"))
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def test_cv32e40p(self):
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self.assertTrue(self.boot_test("cv32e40p"))
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def test_ibex(self):
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self.assertTrue(self.boot_test("ibex"))
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def test_serv(self):
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self.assertTrue(self.boot_test("serv"))
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def test_femtorv(self):
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self.assertTrue(self.boot_test("femtorv"))
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def test_picorv32(self):
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self.assertTrue(self.boot_test("picorv32"))
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2022-05-19 09:07:46 -04:00
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def test_cva6(self):
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self.assertTrue(self.boot_test("cva6"))
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2021-10-26 09:36:07 -04:00
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# OpenRISC CPUs.
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2021-10-26 10:30:02 -04:00
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#def test_mor1kx(self):
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# self.assertTrue(self.boot_test("mor1kx"))
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# PowerPC CPUs.
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#def test_microwatt(self):
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# self.assertTrue(self.boot_test("microwatt", cpu_variant="standard+ghdl"))
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# LM32 CPUs.
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#def test_lm32(self):
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# self.assertTrue(self.boot_test("lm32"))
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