41 lines
971 B
Python
41 lines
971 B
Python
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from migen.fhdl.std import *
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from migen.flow.actor import *
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from migen.genlib import fifo
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def FIFOWrapper(sink, source, fifo):
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return [
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sink.ack.eq(fifo.writable),
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fifo.we.eq(sink.stb & sink.ack),
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fifo.din.eq(sink.payload),
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source.stb.eq(fifo.readable),
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source.payload.eq(fifo.dout),
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fifo.re.eq(source.ack)
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]
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class SyncFIFO(Module):
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def __init__(self, layout, depth):
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self.sink = Sink(layout)
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self.source = Source(layout)
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self.busy = Signal()
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_fifo = fifo.SyncFIFO(layout, depth)
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self.submodules += _fifo
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self.comb += FIFOWrapper(self.sink, self.source, _fifo)
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class AsyncFIFO(Module):
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def __init__(self, layout, depth, cd_write="write", cd_read="read"):
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self.sink = Sink(layout)
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self.source = Source(layout)
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self.busy = Signal()
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_fifo = RenameClockDomains(fifo.AsyncFIFO(layout, depth),
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{"write": cd_write, "read": cd_read})
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self.submodules += _fifo
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self.comb += FIFOWrapper(self.sink, self.source, _fifo)
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