2012-03-05 14:31:41 -05:00
|
|
|
from migen.fhdl.structure import *
|
2012-03-06 09:26:04 -05:00
|
|
|
from migen.sim.generic import Simulator, TopLevel
|
2012-03-05 14:31:41 -05:00
|
|
|
from migen.sim.icarus import Runner
|
|
|
|
|
|
|
|
class Counter:
|
|
|
|
def __init__(self):
|
2012-03-06 09:00:02 -05:00
|
|
|
self.ce = Signal()
|
2012-03-05 14:31:41 -05:00
|
|
|
self.count = Signal(BV(4))
|
|
|
|
|
|
|
|
def do_simulation(self, s, cycle):
|
2012-03-06 09:00:02 -05:00
|
|
|
if cycle % 2:
|
|
|
|
s.wr(self.ce, 0)
|
|
|
|
else:
|
|
|
|
s.wr(self.ce, 1)
|
2012-03-05 14:31:41 -05:00
|
|
|
print("Cycle: " + str(cycle) + " Count: " + str(s.rd(self.count)))
|
|
|
|
|
|
|
|
def get_fragment(self):
|
2012-03-06 09:00:02 -05:00
|
|
|
sync = [If(self.ce, self.count.eq(self.count + 1))]
|
2012-03-05 14:31:41 -05:00
|
|
|
sim = [self.do_simulation]
|
|
|
|
return Fragment(sync=sync, sim=sim)
|
|
|
|
|
2012-03-06 09:00:02 -05:00
|
|
|
def main():
|
|
|
|
dut = Counter()
|
2012-03-06 09:26:04 -05:00
|
|
|
sim = Simulator(dut.get_fragment(), Runner(), TopLevel("my.vcd"))
|
2012-03-06 09:00:02 -05:00
|
|
|
sim.run(10)
|
|
|
|
|
|
|
|
main()
|