2020-08-23 09:40:21 -04:00
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#
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# This file is part of LiteX.
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#
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# Copyright (c) 2019 Florent Kermarrec <florent@enjoy-digital.fr>
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# SPDX-License-Identifier: BSD-2-Clause
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2019-11-15 04:29:39 -05:00
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import unittest
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import random
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from migen import *
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from litex.soc.interconnect.stream import *
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from litex.soc.interconnect.packet import *
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packet_header_length = 31
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packet_header_fields = {
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"field_8b" : HeaderField(0, 0, 8),
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"field_16b" : HeaderField(1, 0, 16),
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"field_32b" : HeaderField(3, 0, 32),
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"field_64b" : HeaderField(7, 0, 64),
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"field_128b": HeaderField(15, 0, 128),
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}
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packet_header = Header(
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fields = packet_header_fields,
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length = packet_header_length,
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swap_field_bytes = True)
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def packet_description(dw):
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param_layout = packet_header.get_layout()
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payload_layout = [("data", dw)]
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return EndpointDescription(payload_layout, param_layout)
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def raw_description(dw):
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payload_layout = [("data", dw)]
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return EndpointDescription(payload_layout)
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class Packet:
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def __init__(self, header, datas):
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self.header = header
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self.datas = datas
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class TestPacket(unittest.TestCase):
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2019-11-15 05:32:42 -05:00
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def loopback_test(self, dw):
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prng = random.Random(42)
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# Prepare packets
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npackets = 8
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packets = []
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for n in range(npackets):
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header = {}
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header["field_8b"] = prng.randrange(2**8)
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header["field_16b"] = prng.randrange(2**16)
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header["field_32b"] = prng.randrange(2**32)
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header["field_64b"] = prng.randrange(2**64)
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header["field_128b"] = prng.randrange(2**128)
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datas = [prng.randrange(2**dw) for _ in range(prng.randrange(2**7))]
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packets.append(Packet(header, datas))
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2019-11-16 02:49:04 -05:00
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def generator(dut, valid_rand=50):
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2019-11-15 04:29:39 -05:00
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# Send packets
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for packet in packets:
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yield dut.sink.field_8b.eq(packet.header["field_8b"])
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yield dut.sink.field_16b.eq(packet.header["field_16b"])
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yield dut.sink.field_32b.eq(packet.header["field_32b"])
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yield dut.sink.field_64b.eq(packet.header["field_64b"])
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yield dut.sink.field_128b.eq(packet.header["field_128b"])
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yield
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for n, data in enumerate(packet.datas):
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yield dut.sink.valid.eq(1)
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yield dut.sink.last.eq(n == (len(packet.datas) - 1))
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yield dut.sink.data.eq(data)
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yield
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while (yield dut.sink.ready) == 0:
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yield
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yield dut.sink.valid.eq(0)
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yield dut.sink.last.eq(0)
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while prng.randrange(100) < valid_rand:
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yield
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2019-11-16 08:39:18 -05:00
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def checker(dut, ready_rand=50):
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dut.header_errors = 0
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dut.data_errors = 0
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dut.last_errors = 0
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# Receive and check packets
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for packet in packets:
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for n, data in enumerate(packet.datas):
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yield dut.source.ready.eq(0)
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yield
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while (yield dut.source.valid) == 0:
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yield
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while prng.randrange(100) < ready_rand:
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yield
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yield dut.source.ready.eq(1)
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yield
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2019-11-15 04:29:39 -05:00
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for field in ["field_8b", "field_16b", "field_32b", "field_64b", "field_128b"]:
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if (yield getattr(dut.source, field)) != packet.header[field]:
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dut.header_errors += 1
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#print("{:x} vs {:x}".format((yield dut.source.data), data))
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if ((yield dut.source.data) != data):
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dut.data_errors += 1
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if ((yield dut.source.last) != (n == (len(packet.datas) - 1))):
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dut.last_errors += 1
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yield
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class DUT(Module):
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def __init__(self):
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packetizer = Packetizer(packet_description(dw), raw_description(dw), packet_header)
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depacketizer = Depacketizer(raw_description(dw), packet_description(dw), packet_header)
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self.submodules += packetizer, depacketizer
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self.comb += packetizer.source.connect(depacketizer.sink)
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self.sink, self.source = packetizer.sink, depacketizer.source
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dut = DUT()
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run_simulation(dut, [generator(dut), checker(dut)])
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self.assertEqual(dut.header_errors, 0)
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self.assertEqual(dut.data_errors, 0)
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self.assertEqual(dut.last_errors, 0)
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def test_8bit_loopback(self):
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self.loopback_test(dw=8)
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2019-11-15 05:36:52 -05:00
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def test_32bit_loopback(self):
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self.loopback_test(dw=32)
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def test_64bit_loopback(self):
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self.loopback_test(dw=64)
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def test_128bit_loopback(self):
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self.loopback_test(dw=128)
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