litex/migen/fhdl/std.py

from migen.fhdl.structure import *
from migen.fhdl.module import Module
from migen.fhdl.specials import TSTriple, Instance, Memory
from migen.fhdl.size import log2_int, bits_for, flen, fiter, fslice, freversed
from migen.fhdl.decorators import DecorateModule, InsertCE, InsertReset, RenameClockDomains
New migen.fhdl.std to simplify imports + len->flen 2013-05-22 11:11:09 -04:00			`from migen.fhdl.structure import *`
			`from migen.fhdl.module import Module`
			`from migen.fhdl.specials import TSTriple, Instance, Memory`
migen.fhdl.size: add fiter(), fslice(), and freversed() do not overload __len__, __iter__, __reversed__ as not all valid expressions (ints and bools) have them. furthermore len([]) is and should be different from flen([]) (the later raises an error). keep __getitem__ as an exception that proves the rule ;) 2013-12-02 19:19:32 -05:00			`from migen.fhdl.size import log2_int, bits_for, flen, fiter, fslice, freversed`
fhdl: RenameClockDomains decorator 2013-07-26 09:42:14 -04:00			`from migen.fhdl.decorators import DecorateModule, InsertCE, InsertReset, RenameClockDomains`