2012-05-21 13:46:04 -04:00
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from migen.fhdl.structure import *
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2013-03-10 14:32:38 -04:00
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from migen.fhdl.module import Module
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2012-05-21 13:46:04 -04:00
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from migen.bank.description import *
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from migen.bank.eventmanager import *
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2013-03-10 14:32:38 -04:00
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class Timer(Module, AutoReg):
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def __init__(self, width=32):
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2013-03-12 10:47:54 -04:00
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self._en = RegisterField()
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self._value = RegisterField(width, access_dev=READ_WRITE)
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self._reload = RegisterField(width)
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2012-05-21 13:46:04 -04:00
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2013-03-10 14:32:38 -04:00
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self.submodules.ev = EventManager()
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self.ev.zero = EventSourceLevel()
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self.ev.finalize()
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###
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2012-05-21 13:46:04 -04:00
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2013-03-10 14:32:38 -04:00
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self.comb += [
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2012-05-21 13:46:04 -04:00
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If(self._value.field.r == 0,
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self._value.field.w.eq(self._reload.field.r)
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).Else(
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self._value.field.w.eq(self._value.field.r - 1)
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),
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self._value.field.we.eq(self._en.field.r),
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2013-03-10 14:32:38 -04:00
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self.ev.zero.trigger.eq(self._value.field.r != 0)
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2012-05-21 13:46:04 -04:00
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]
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