litex/lib/sata/k7sataphy.py

from migen.fhdl.std import *
from lib.sata.k7satagtx import SATAGTX

class K7SATAPHY(Module):
	def __init__(self, pads):
		self.sata_gtx = SATAGTX(pads)
create k7satagtx.py and move GTXE2 primitive inside 2014-09-23 08:03:51 -04:00			`from migen.fhdl.std import *`
add SATAGTX with RX/TX clocking and reset (no DRP for now) 2014-09-23 09:58:34 -04:00			`from lib.sata.k7satagtx import SATAGTX`
create GTXE2_CHANNEL & GTXE2_COMMON class / add IO signals and parameters 2014-09-23 07:57:02 -04:00
create k7satagtx.py and move GTXE2 primitive inside 2014-09-23 08:03:51 -04:00			`class K7SATAPHY(Module):`
			`def __init__(self, pads):`
add SATAGTX with RX/TX clocking and reset (no DRP for now) 2014-09-23 09:58:34 -04:00			`self.sata_gtx = SATAGTX(pads)`