liteeth: fix import (from liteeth --> from misoclib.liteeth)

misoclib/liteeth/core/__init__.py

@@ -1,10 +1,10 @@
-from liteeth.common import *
-from liteeth.generic import *
-from liteeth.mac import LiteEthMAC
-from liteeth.core.arp import LiteEthARP
-from liteeth.core.ip import LiteEthIP
-from liteeth.core.udp import LiteEthUDP
-from liteeth.core.icmp import LiteEthICMP
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
+from misoclib.liteeth.mac import LiteEthMAC
+from misoclib.liteeth.core.arp import LiteEthARP
+from misoclib.liteeth.core.ip import LiteEthIP
+from misoclib.liteeth.core.udp import LiteEthUDP
+from misoclib.liteeth.core.icmp import LiteEthICMP
 
 class LiteEthIPCore(Module, AutoCSR):
 	def __init__(self, phy, mac_address, ip_address, clk_freq):

misoclib/liteeth/core/arp/__init__.py

@@ -1,7 +1,7 @@
-from liteeth.common import *
-from liteeth.generic import *
-from liteeth.generic.depacketizer import LiteEthDepacketizer
-from liteeth.generic.packetizer import LiteEthPacketizer
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
+from misoclib.liteeth.generic.depacketizer import LiteEthDepacketizer
+from misoclib.liteeth.generic.packetizer import LiteEthPacketizer
 
 _arp_table_layout = [
 		("reply", 1),

misoclib/liteeth/core/etherbone/__init__.py

@@ -1,11 +1,11 @@
-from liteeth.common import *
-from liteeth.generic import *
-from liteeth.generic.arbiter import Arbiter
-from liteeth.generic.dispatcher import Dispatcher
-from liteeth.core.etherbone.packet import *
-from liteeth.core.etherbone.probe import *
-from liteeth.core.etherbone.record import *
-from liteeth.core.etherbone.wishbone import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
+from misoclib.liteeth.generic.arbiter import Arbiter
+from misoclib.liteeth.generic.dispatcher import Dispatcher
+from misoclib.liteeth.core.etherbone.packet import *
+from misoclib.liteeth.core.etherbone.probe import *
+from misoclib.liteeth.core.etherbone.record import *
+from misoclib.liteeth.core.etherbone.wishbone import *
 
 class LiteEthEtherbone(Module):
 	def __init__(self, udp, udp_port):

misoclib/liteeth/core/etherbone/packet.py

@@ -1,7 +1,7 @@
-from liteeth.common import *
-from liteeth.generic import *
-from liteeth.generic.depacketizer import LiteEthDepacketizer
-from liteeth.generic.packetizer import LiteEthPacketizer
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
+from misoclib.liteeth.generic.depacketizer import LiteEthDepacketizer
+from misoclib.liteeth.generic.packetizer import LiteEthPacketizer
 
 class LiteEthEtherbonePacketPacketizer(LiteEthPacketizer):
 	def __init__(self):

misoclib/liteeth/core/etherbone/probe.py

@@ -1,5 +1,5 @@
-from liteeth.common import *
-from liteeth.generic import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
 
 class LiteEthEtherboneProbe(Module):
 	def __init__(self):

misoclib/liteeth/core/etherbone/record.py

@@ -1,7 +1,7 @@
-from liteeth.common import *
-from liteeth.generic import *
-from liteeth.generic.depacketizer import LiteEthDepacketizer
-from liteeth.generic.packetizer import LiteEthPacketizer
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
+from misoclib.liteeth.generic.depacketizer import LiteEthDepacketizer
+from misoclib.liteeth.generic.packetizer import LiteEthPacketizer
 
 class LiteEthEtherboneRecordPacketizer(LiteEthPacketizer):
 	def __init__(self):

misoclib/liteeth/core/etherbone/wishbone.py

@@ -1,5 +1,5 @@
-from liteeth.common import *
-from liteeth.generic import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
 from migen.bus import wishbone
 
 class LiteEthEtherboneWishboneMaster(Module):

misoclib/liteeth/core/icmp/__init__.py

@@ -1,7 +1,7 @@
-from liteeth.common import *
-from liteeth.generic import *
-from liteeth.generic.depacketizer import LiteEthDepacketizer
-from liteeth.generic.packetizer import LiteEthPacketizer
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
+from misoclib.liteeth.generic.depacketizer import LiteEthDepacketizer
+from misoclib.liteeth.generic.packetizer import LiteEthPacketizer
 
 class LiteEthICMPPacketizer(LiteEthPacketizer):
 	def __init__(self):

misoclib/liteeth/core/ip/__init__.py

@@ -1,9 +1,9 @@
-from liteeth.common import *
-from liteeth.generic import *
-from liteeth.core.ip.checksum import *
-from liteeth.core.ip.crossbar import *
-from liteeth.generic.depacketizer import LiteEthDepacketizer
-from liteeth.generic.packetizer import LiteEthPacketizer
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
+from misoclib.liteeth.core.ip.checksum import *
+from misoclib.liteeth.core.ip.crossbar import *
+from misoclib.liteeth.generic.depacketizer import LiteEthDepacketizer
+from misoclib.liteeth.generic.packetizer import LiteEthPacketizer
 
 class LiteEthIPV4Packetizer(LiteEthPacketizer):
 	def __init__(self):

misoclib/liteeth/core/ip/checksum.py

@@ -1,5 +1,5 @@
-from liteeth.common import *
-from liteeth.generic import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
 
 class LiteEthIPV4Checksum(Module):
 	def __init__(self, words_per_clock_cycle=1, skip_checksum=False):

misoclib/liteeth/core/ip/crossbar.py

@@ -1,6 +1,6 @@
-from liteeth.common import *
-from liteeth.generic import *
-from liteeth.generic.crossbar import LiteEthCrossbar
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
+from misoclib.liteeth.generic.crossbar import LiteEthCrossbar
 
 class LiteEthIPV4MasterPort:
 	def __init__(self, dw):

misoclib/liteeth/core/tty/__init__.py

@@ -1,5 +1,5 @@
-from liteeth.common import *
-from liteeth.generic import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
 
 class LiteEthTTYTX(Module):
 	def __init__(self, ip_address, udp_port, fifo_depth=None):

misoclib/liteeth/core/udp/__init__.py

@@ -1,8 +1,8 @@
-from liteeth.common import *
-from liteeth.generic import *
-from liteeth.core.udp.crossbar import *
-from liteeth.generic.depacketizer import LiteEthDepacketizer
-from liteeth.generic.packetizer import LiteEthPacketizer
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
+from misoclib.liteeth.core.udp.crossbar import *
+from misoclib.liteeth.generic.depacketizer import LiteEthDepacketizer
+from misoclib.liteeth.generic.packetizer import LiteEthPacketizer
 
 class LiteEthUDPPacketizer(LiteEthPacketizer):
 	def __init__(self):

misoclib/liteeth/core/udp/crossbar.py

@@ -1,7 +1,7 @@
-from liteeth.common import *
-from liteeth.generic import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
 
-from liteeth.generic.crossbar import LiteEthCrossbar
+from misoclib.liteeth.generic.crossbar import LiteEthCrossbar
 
 class LiteEthUDPMasterPort:
 	def __init__(self, dw):

misoclib/liteeth/example_designs/make.py

@@ -10,7 +10,7 @@ from migen.bank.description import CSRStatus
 from mibuild import tools
 from mibuild.xilinx_common import *
 
-from liteeth.common import *
+from misoclib.liteeth.common import *
 
 def get_csr_csv(regions):
 	r = ""

misoclib/liteeth/example_designs/targets/base.py

@@ -14,10 +14,10 @@ from litescope.bridge.uart2wb import LiteScopeUART2WB
 from litescope.frontend.la import LiteScopeLA
 from litescope.core.port import LiteScopeTerm
 
-from liteeth.common import *
-from liteeth.generic import *
-from liteeth.phy.gmii import LiteEthPHYGMII
-from liteeth.core import LiteEthUDPIPCore
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
+from misoclib.liteeth.phy.gmii import LiteEthPHYGMII
+from misoclib.liteeth.core import LiteEthUDPIPCore
 
 class _CRG(Module):
 	def __init__(self, platform):

misoclib/liteeth/example_designs/targets/etherbone.py

@@ -2,11 +2,11 @@ from litescope.common import *
 from litescope.frontend.la import LiteScopeLA
 from litescope.core.port import LiteScopeTerm
 
-from liteeth.common import *
-from liteeth.generic import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
 
 from targets.base import BaseSoC
-from liteeth.core.etherbone import LiteEthEtherbone
+from misoclib.liteeth.core.etherbone import LiteEthEtherbone
 
 class EtherboneSoC(BaseSoC):
 	default_platform = "kc705"

misoclib/liteeth/example_designs/targets/tty.py

@@ -2,11 +2,11 @@ from litescope.common import *
 from litescope.frontend.la import LiteScopeLA
 from litescope.core.port import LiteScopeTerm
 
-from liteeth.common import *
-from liteeth.generic import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
 
 from targets.base import BaseSoC
-from liteeth.core.tty import LiteEthTTY
+from misoclib.liteeth.core.tty import LiteEthTTY
 
 class TTYSoC(BaseSoC):
 	default_platform = "kc705"

misoclib/liteeth/example_designs/targets/udp.py

@@ -2,8 +2,8 @@ from litescope.common import *
 from litescope.frontend.la import LiteScopeLA
 from litescope.core.port import LiteScopeTerm
 
-from liteeth.common import *
-from liteeth.generic import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
 
 from targets.base import BaseSoC
 

misoclib/liteeth/example_designs/test/test_etherbone.py

@@ -1,5 +1,5 @@
 import socket, time
-from liteeth.test.model.etherbone import *
+from misoclib.liteeth.test.model.etherbone import *
 
 SRAM_BASE = 0x02000000
 

misoclib/liteeth/generic/__init__.py

@@ -1,4 +1,4 @@
-from liteeth.common import *
+from misoclib.liteeth.common import *
 
 # Generic classes
 class Port:

misoclib/liteeth/generic/crossbar.py

@@ -1,9 +1,9 @@
 from collections import OrderedDict
 
-from liteeth.common import *
-from liteeth.generic import *
-from liteeth.generic.arbiter import Arbiter
-from liteeth.generic.dispatcher import Dispatcher
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
+from misoclib.liteeth.generic.arbiter import Arbiter
+from misoclib.liteeth.generic.dispatcher import Dispatcher
 
 class LiteEthCrossbar(Module):
 	def __init__(self, master_port, dispatch_param):

misoclib/liteeth/generic/depacketizer.py

@@ -1,5 +1,5 @@
-from liteeth.common import *
-from liteeth.generic import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
 
 def _decode_header(h_dict, h_signal, obj):
 	r = []

misoclib/liteeth/generic/packetizer.py

@@ -1,5 +1,5 @@
-from liteeth.common import *
-from liteeth.generic import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
 
 def _encode_header(h_dict, h_signal, obj):
 	r = []

misoclib/liteeth/mac/__init__.py

@@ -1,8 +1,8 @@
-from liteeth.common import *
-from liteeth.generic import *
-from liteeth.mac.common import *
-from liteeth.mac.core import LiteEthMACCore
-from liteeth.mac.frontend.wishbone import LiteEthMACWishboneInterface
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
+from misoclib.liteeth.mac.common import *
+from misoclib.liteeth.mac.core import LiteEthMACCore
+from misoclib.liteeth.mac.frontend.wishbone import LiteEthMACWishboneInterface
 
 class LiteEthMAC(Module, AutoCSR):
 	def __init__(self, phy, dw, interface="crossbar", endianness="big",

misoclib/liteeth/mac/common.py

@@ -1,8 +1,8 @@
-from liteeth.common import *
-from liteeth.generic import *
-from liteeth.generic.depacketizer import LiteEthDepacketizer
-from liteeth.generic.packetizer import LiteEthPacketizer
-from liteeth.generic.crossbar import LiteEthCrossbar
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
+from misoclib.liteeth.generic.depacketizer import LiteEthDepacketizer
+from misoclib.liteeth.generic.packetizer import LiteEthPacketizer
+from misoclib.liteeth.generic.crossbar import LiteEthCrossbar
 
 class LiteEthMACDepacketizer(LiteEthDepacketizer):
 	def __init__(self):

misoclib/liteeth/mac/core/__init__.py

@@ -1,6 +1,6 @@
-from liteeth.common import *
-from liteeth.generic import *
-from liteeth.mac.core import gap, preamble, crc, padding, last_be
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
+from misoclib.liteeth.mac.core import gap, preamble, crc, padding, last_be
 
 class LiteEthMACCore(Module, AutoCSR):
 	def __init__(self, phy, dw, endianness="big", with_hw_preamble_crc=True):

misoclib/liteeth/mac/core/crc.py

@@ -1,5 +1,5 @@
-from liteeth.common import *
-from liteeth.generic import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
 
 class LiteEthMACCRCEngine(Module):
 	"""Cyclic Redundancy Check Engine

misoclib/liteeth/mac/core/gap.py

@@ -1,5 +1,5 @@
-from liteeth.common import *
-from liteeth.generic import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
 
 class LiteEthMACGap(Module):
 	def __init__(self, dw, ack_on_gap=False):

misoclib/liteeth/mac/core/last_be.py

@@ -1,5 +1,5 @@
-from liteeth.common import *
-from liteeth.generic import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
 
 class LiteEthMACTXLastBE(Module):
 	def __init__(self, dw):

misoclib/liteeth/mac/core/padding.py

@@ -1,5 +1,5 @@
-from liteeth.common import *
-from liteeth.generic import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
 
 class LiteEthMACPaddingInserter(Module):
 	def __init__(self, dw, packet_min_length):

misoclib/liteeth/mac/core/preamble.py

@@ -1,5 +1,5 @@
-from liteeth.common import *
-from liteeth.generic import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
 
 class LiteEthMACPreambleInserter(Module):
 	def __init__(self, dw):

misoclib/liteeth/mac/frontend/sram.py

@@ -1,5 +1,5 @@
-from liteeth.common import *
-from liteeth.generic import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
 
 from migen.bank.description import *
 from migen.bank.eventmanager import *

misoclib/liteeth/mac/frontend/wishbone.py

@@ -1,6 +1,6 @@
-from liteeth.common import *
-from liteeth.generic import *
-from liteeth.mac.frontend import sram
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
+from misoclib.liteeth.mac.frontend import sram
 
 from migen.bus import wishbone
 from migen.fhdl.simplify import FullMemoryWE

misoclib/liteeth/phy/gmii.py

@@ -1,5 +1,5 @@
-from liteeth.common import *
-from liteeth.generic import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
 
 class LiteEthPHYGMIITX(Module):
 	def __init__(self, pads):

misoclib/liteeth/phy/loopback.py

@@ -1,5 +1,5 @@
-from liteeth.common import *
-from liteeth.generic import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
 
 class LiteEthPHYLoopbackCRG(Module, AutoCSR):
 	def __init__(self):

misoclib/liteeth/phy/mii.py

@@ -1,5 +1,5 @@
-from liteeth.common import *
-from liteeth.generic import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
 
 class LiteEthPHYMIITX(Module):
 	def __init__(self, pads):

misoclib/liteeth/phy/sim.py

@@ -1,5 +1,5 @@
-from liteeth.common import *
-from liteeth.generic import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
 
 class LiteEthPHYSimCRG(Module, AutoCSR):
 	def __init__(self):

misoclib/liteeth/test/arp_tb.py

@@ -3,12 +3,12 @@ from migen.bus import wishbone
 from migen.bus.transactions import *
 from migen.sim.generic import run_simulation
 
-from liteeth.common import *
-from liteeth.mac import LiteEthMAC
-from liteeth.core.arp import LiteEthARP
+from misoclib.liteeth.common import *
+from misoclib.liteeth.mac import LiteEthMAC
+from misoclib.liteeth.core.arp import LiteEthARP
 
-from liteeth.test.common import *
-from liteeth.test.model import phy, mac, arp
+from misoclib.liteeth.test.common import *
+from misoclib.liteeth.test.model import phy, mac, arp
 
 ip_address = 0x12345678
 mac_address = 0x12345678abcd

misoclib/liteeth/test/common.py

@@ -4,7 +4,7 @@ from migen.fhdl.std import *
 from migen.flow.actor import Sink, Source
 from migen.genlib.record import *
 
-from liteeth.common import *
+from misoclib.liteeth.common import *
 
 def print_with_prefix(s, prefix=""):
 	if not isinstance(s, str):

misoclib/liteeth/test/etherbone_tb.py

@@ -3,12 +3,12 @@ from migen.bus import wishbone
 from migen.bus.transactions import *
 from migen.sim.generic import run_simulation
 
-from liteeth.common import *
-from liteeth.core import LiteEthUDPIPCore
-from liteeth.core.etherbone import LiteEthEtherbone
+from misoclib.liteeth.common import *
+from misoclib.liteeth.core import LiteEthUDPIPCore
+from misoclib.liteeth.core.etherbone import LiteEthEtherbone
 
-from liteeth.test.common import *
-from liteeth.test.model import phy, mac, arp, ip, udp, etherbone
+from misoclib.liteeth.test.common import *
+from misoclib.liteeth.test.model import phy, mac, arp, ip, udp, etherbone
 
 ip_address = 0x12345678
 mac_address = 0x12345678abcd

misoclib/liteeth/test/icmp_tb.py

@@ -3,15 +3,15 @@ from migen.bus import wishbone
 from migen.bus.transactions import *
 from migen.sim.generic import run_simulation
 
-from liteeth.common import *
-from liteeth.core import LiteEthIPCore
+from misoclib.liteeth.common import *
+from misoclib.liteeth.core import LiteEthIPCore
 
-from liteeth.test.common import *
-from liteeth.test.model.dumps import *
-from liteeth.test.model.mac import *
-from liteeth.test.model.ip import *
-from liteeth.test.model.icmp import *
-from liteeth.test.model import phy, mac, arp, ip, icmp
+from misoclib.liteeth.test.common import *
+from misoclib.liteeth.test.model.dumps import *
+from misoclib.liteeth.test.model.mac import *
+from misoclib.liteeth.test.model.ip import *
+from misoclib.liteeth.test.model.icmp import *
+from misoclib.liteeth.test.model import phy, mac, arp, ip, icmp
 
 ip_address = 0x12345678
 mac_address = 0x12345678abcd

misoclib/liteeth/test/ip_tb.py

@@ -3,11 +3,11 @@ from migen.bus import wishbone
 from migen.bus.transactions import *
 from migen.sim.generic import run_simulation
 
-from liteeth.common import *
-from liteeth.core import LiteEthIPCore
+from misoclib.liteeth.common import *
+from misoclib.liteeth.core import LiteEthIPCore
 
-from liteeth.test.common import *
-from liteeth.test.model import phy, mac, arp, ip
+from misoclib.liteeth.test.common import *
+from misoclib.liteeth.test.model import phy, mac, arp, ip
 
 ip_address = 0x12345678
 mac_address = 0x12345678abcd

misoclib/liteeth/test/mac_core_tb.py

@@ -3,11 +3,11 @@ from migen.bus import wishbone
 from migen.bus.transactions import *
 from migen.sim.generic import run_simulation
 
-from liteeth.common import *
-from liteeth.mac.core import LiteEthMACCore
+from misoclib.liteeth.common import *
+from misoclib.liteeth.mac.core import LiteEthMACCore
 
-from liteeth.test.common import *
-from liteeth.test.model import phy, mac
+from misoclib.liteeth.test.common import *
+from misoclib.liteeth.test.model import phy, mac
 
 class TB(Module):
 	def __init__(self):

misoclib/liteeth/test/mac_wishbone_tb.py

@@ -3,11 +3,11 @@ from migen.bus import wishbone
 from migen.bus.transactions import *
 from migen.sim.generic import run_simulation
 
-from liteeth.common import *
-from liteeth.mac import LiteEthMAC
+from misoclib.liteeth.common import *
+from misoclib.liteeth.mac import LiteEthMAC
 
-from liteeth.test.common import *
-from liteeth.test.model import phy, mac
+from misoclib.liteeth.test.common import *
+from misoclib.liteeth.test.model import phy, mac
 
 class WishboneMaster:
 	def __init__(self, obj):

misoclib/liteeth/test/model/arp.py

@@ -1,9 +1,9 @@
 import math
 
-from liteeth.common import *
-from liteeth.test.common import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.test.common import *
 
-from liteeth.test.model import mac
+from misoclib.liteeth.test.model import mac
 
 def print_arp(s):
 	print_with_prefix(s, "[ARP]")
@@ -118,8 +118,8 @@ class ARP(Module):
 		request.target_ip = ip_address
 
 if __name__ == "__main__":
-	from liteeth.test.model.dumps import *
-	from liteeth.test.model.mac import *
+	from misoclib.liteeth.test.model.dumps import *
+	from misoclib.liteeth.test.model.mac import *
 	errors = 0
 	# ARP request
 	packet = MACPacket(arp_request)

misoclib/liteeth/test/model/etherbone.py

@@ -1,9 +1,9 @@
 import math, copy
 
-from liteeth.common import *
-from liteeth.test.common import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.test.common import *
 
-from liteeth.test.model import udp
+from misoclib.liteeth.test.model import udp
 
 def print_etherbone(s):
 	print_with_prefix(s, "[ETHERBONE]")

misoclib/liteeth/test/model/icmp.py

@@ -1,9 +1,9 @@
 import math
 
-from liteeth.common import *
-from liteeth.test.common import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.test.common import *
 
-from liteeth.test.model import ip
+from misoclib.liteeth.test.model import ip
 
 def print_icmp(s):
 	print_with_prefix(s, "[ICMP]")
@@ -79,9 +79,9 @@ class ICMP(Module):
 		pass
 
 if __name__ == "__main__":
-	from liteeth.test.model.dumps import *
-	from liteeth.test.model.mac import *
-	from liteeth.test.model.ip import *
+	from misoclib.liteeth.test.model.dumps import *
+	from misoclib.liteeth.test.model.mac import *
+	from misoclib.liteeth.test.model.ip import *
 	errors = 0
 	# ICMP packet
 	packet = MACPacket(ping_request)

misoclib/liteeth/test/model/ip.py

@@ -1,9 +1,9 @@
 import math
 
-from liteeth.common import *
-from liteeth.test.common import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.test.common import *
 
-from liteeth.test.model import mac
+from misoclib.liteeth.test.model import mac
 
 def print_ip(s):
 	print_with_prefix(s, "[IP]")
@@ -124,8 +124,8 @@ class IP(Module):
 				self.icmp_callback(packet)
 
 if __name__ == "__main__":
-	from liteeth.test.model.dumps import *
-	from liteeth.test.model.mac import *
+	from misoclib.liteeth.test.model.dumps import *
+	from misoclib.liteeth.test.model.mac import *
 	errors = 0
 	# UDP packet
 	packet = MACPacket(udp)

misoclib/liteeth/test/model/mac.py

@@ -1,7 +1,7 @@
 import math, binascii
 
-from liteeth.common import *
-from liteeth.test.common import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.test.common import *
 
 def print_mac(s):
 	print_with_prefix(s, "[MAC]")
@@ -127,7 +127,7 @@ class MAC(Module):
 				raise ValueError # XXX handle this properly
 
 if __name__ == "__main__":
-	from liteeth.test.model.dumps import *
+	from misoclib.liteeth.test.model.dumps import *
 	errors = 0
 	packet = MACPacket(arp_request)
 	packet.decode_remove_header()

misoclib/liteeth/test/model/phy.py

@@ -1,5 +1,5 @@
-from liteeth.common import *
-from liteeth.test.common import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.test.common import *
 
 def print_phy(s):
 	print_with_prefix(s, "[PHY]")

misoclib/liteeth/test/model/udp.py

@@ -1,9 +1,9 @@
 import math
 
-from liteeth.common import *
-from liteeth.test.common import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.test.common import *
 
-from liteeth.test.model import ip
+from misoclib.liteeth.test.model import ip
 
 def print_udp(s):
 	print_with_prefix(s, "[UDP]")
@@ -90,9 +90,9 @@ class UDP(Module):
 				self.etherbone_callback(packet)
 
 if __name__ == "__main__":
-	from liteeth.test.model.dumps import *
-	from liteeth.test.model.mac import *
-	from liteeth.test.model.ip import *
+	from misoclib.liteeth.test.model.dumps import *
+	from misoclib.liteeth.test.model.mac import *
+	from misoclib.liteeth.test.model.ip import *
 	errors = 0
 	# UDP packet
 	packet = MACPacket(udp)

misoclib/liteeth/test/udp_tb.py

@@ -3,11 +3,11 @@ from migen.bus import wishbone
 from migen.bus.transactions import *
 from migen.sim.generic import run_simulation
 
-from liteeth.common import *
-from liteeth.core import LiteEthUDPIPCore
+from misoclib.liteeth.common import *
+from misoclib.liteeth.core import LiteEthUDPIPCore
 
-from liteeth.test.common import *
-from liteeth.test.model import phy, mac, arp, ip, udp
+from misoclib.liteeth.test.common import *
+from misoclib.liteeth.test.model import phy, mac, arp, ip, udp
 
 ip_address = 0x12345678
 mac_address = 0x12345678abcd

targets/kc705.py

@@ -5,9 +5,8 @@ from misoclib import sdram, spiflash
 from misoclib.sdram.phy import k7ddrphy
 from misoclib.gensoc import SDRAMSoC
 
-from extcores import *
-from liteeth.phy.gmii import LiteEthPHYGMII
-from liteeth.mac import LiteEthMAC
+from misoclib.liteeth.phy.gmii import LiteEthPHYGMII
+from misoclib.liteeth.mac import LiteEthMAC
 
 class _CRG(Module):
 	def __init__(self, platform):

targets/mlabs_video.py

@@ -8,9 +8,8 @@ from misoclib import sdram, mxcrg, norflash16, framebuffer, gpio
 from misoclib.sdram.phy import s6ddrphy
 from misoclib.gensoc import SDRAMSoC
 
-from extcores import *
-from liteeth.phy.mii import LiteEthPHYMII
-from liteeth.mac import LiteEthMAC
+from misoclib.liteeth.phy.mii import LiteEthPHYMII
+from misoclib.liteeth.mac import LiteEthMAC
 
 class _MXClockPads:
 	def __init__(self, platform):