Hardware
/
litex
mirror of https://github.com/enjoy-digital/litex.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

soc/cores/jtag: Fix/Test p_init/p_INIT workaround.

This commit is contained in:
Florent Kermarrec 2024-11-04 14:34:28 +01:00
parent 3f3249cdf0
commit 0170462fe8
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
litex/soc/cores/jtag.py
View File

@ -383,7 +383,7 @@ class ECP5JTAG(LiteXModule):
new_tck = Signal() new_tck = Signal()
self.specials += Instance("LUT4", self.specials += Instance("LUT4",
attr = {"keep"}, attr = {"keep"},
**{f"p_{p_init_name}": 2}, # Use toolchain-specific INIT parameter name. **{f"{p_init_name}": 2}, # Use toolchain-specific INIT parameter name.
i_A = tck, i_A = tck,
i_B = 0, i_B = 0,
i_C = 0, i_C = 0,