Hardware
/
litex
mirror of https://github.com/enjoy-digital/litex.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

build/microsemi/libero_soc.py: replaced tabs by spaces

This commit is contained in:
Gwenhael Goavec-Merou 2024-05-30 08:57:59 +02:00
parent 72cade55da
commit 03e0f0d9a8
1 changed files with 6 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
litex/build/microsemi/libero_soc.py
View File

@ -98,7 +98,7 @@ class MicrosemiLiberoSoCPolarfireToolchain(GenericToolchain):
"-use_enhanced_constraint_flow 1",
"-hdl {VERILOG}",
"-family {PolarFire}",
"-die {}".format(self.tcl_name(die)),
"-die {}".format(self.tcl_name(die)),
"-package {}".format(self.tcl_name(package)),
"-speed {}".format(self.tcl_name("-" + speed)),
"-die_voltage {1.0}",
@ -115,16 +115,16 @@ class MicrosemiLiberoSoCPolarfireToolchain(GenericToolchain):
filename_tcl = "{" + filename + "}"
tcl.append("import_files -hdl_source " + filename_tcl)
# Building the design Hierarchy
# Building the design Hierarchy
tcl.append("build_design_hierarchy")
# Set top level
tcl.append("set_root -module {}".format(self.tcl_name(self._build_name + "::work")))
# Copy init files FIXME: support for include path on LiberoSoC?
# Commenting out copy init file as this breaks the LiberoSoC flow.
# for file in os.listdir(self._build_dir):
# if file.endswith(".init"):
# tcl.append("file copy -- {} impl/synthesis".format(file))
#for file in os.listdir(self._build_dir):
# if file.endswith(".init"):
# tcl.append("file copy -- {} impl/synthesis".format(file))
# Import io constraints
tcl.append("import_files -io_pdc {}".format(self.tcl_name(self._build_name + "_io.pdc")))