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build/xilinx/common: Fix missing clk parameter on XilinxSDRTristateImpl.

This commit is contained in:
Florent Kermarrec 2024-04-05 16:03:33 +02:00
parent dc78c3f47b
commit 06009c57a3
2 changed files with 4 additions and 3 deletions
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1
CHANGES.md
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@ -11,6 +11,7 @@
- litex_sim/serial2console : Fixed RX backpressure handling. - litex_sim/serial2console : Fixed RX backpressure handling.
- litedram/frontend/avalon : Fixed and cleaned-up. - litedram/frontend/avalon : Fixed and cleaned-up.
- litex_sim/video : Fixed pixel format to RGBA. - litex_sim/video : Fixed pixel format to RGBA.
- build/xilinx/common : Fixed missing clk parameter on XilinxSDRTristateImpl.
[> Added [> Added
-------- --------

6
litex/build/xilinx/common.py
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@ -141,9 +141,9 @@ class XilinxSDRTristateImpl(Module):
_o = Signal() _o = Signal()
_oe_n = Signal() _oe_n = Signal()
_i = Signal() _i = Signal()
self.specials += SDROutput(o, _o) self.specials += SDROutput(o, _o, clk)
self.specials += SDROutput(~oe, _oe_n) self.specials += SDROutput(~oe, _oe_n, clk)
self.specials += SDRInput(_i, i) self.specials += SDRInput(_i, i, clk)
self.specials += Instance("IOBUF", self.specials += Instance("IOBUF",
io_IO = io, io_IO = io,
o_O = _i, o_O = _i,