pytholite/reg: use source id in dictionary
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parent
fee22a4631
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070652cc39
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@ -14,7 +14,7 @@ class AbstractLoad:
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def lower(self):
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def lower(self):
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if not self.target.finalized:
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if not self.target.finalized:
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raise FinalizeError
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raise FinalizeError
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return self.target.sel.eq(self.target.source_encoding[self.source])
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return self.target.sel.eq(self.target.source_encoding[id(self.source)])
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class LowerAbstractLoad(fhdl.NodeTransformer):
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class LowerAbstractLoad(fhdl.NodeTransformer):
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def visit_unknown(self, node):
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def visit_unknown(self, node):
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@ -28,11 +28,13 @@ class ImplRegister:
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self.name = name
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self.name = name
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self.storage = Signal(BV(nbits), name=self.name)
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self.storage = Signal(BV(nbits), name=self.name)
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self.source_encoding = {}
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self.source_encoding = {}
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self.id_to_source = {}
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self.finalized = False
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self.finalized = False
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def load(self, source):
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def load(self, source):
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if source not in self.source_encoding:
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if id(source) not in self.source_encoding:
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self.source_encoding[source] = len(self.source_encoding) + 1
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self.source_encoding[id(source)] = len(self.source_encoding) + 1
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self.id_to_source[id(source)] = source
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return AbstractLoad(self, source)
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return AbstractLoad(self, source)
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def finalize(self):
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def finalize(self):
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@ -46,6 +48,6 @@ class ImplRegister:
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raise FinalizeError
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raise FinalizeError
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# do nothing when sel == 0
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# do nothing when sel == 0
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items = sorted(self.source_encoding.items(), key=itemgetter(1))
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items = sorted(self.source_encoding.items(), key=itemgetter(1))
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cases = [(v, self.storage.eq(k)) for k, v in items]
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cases = [(v, self.storage.eq(self.id_to_source[k])) for k, v in items]
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sync = [Case(self.sel, *cases)]
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sync = [Case(self.sel, *cases)]
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return Fragment(sync=sync)
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return Fragment(sync=sync)
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