etherbone: probing OK on hardware

This commit is contained in:
Florent Kermarrec 2015-02-12 12:16:57 +01:00
parent b6aeea676b
commit 0818c29287
3 changed files with 32 additions and 0 deletions

16
test/Makefile Normal file
View File

@ -0,0 +1,16 @@
LEDIR = ../
PYTHON = python3
CMD = PYTHONPATH=$(LEDIR) $(PYTHON)
test_regs:
$(CMD) test_regs.py
test_la:
$(CMD) test_la.py
test_udp:
$(CMD) test_udp.py
test_etherbone:
$(CMD) test_etherbone.py

13
test/test_etherbone.py Normal file
View File

@ -0,0 +1,13 @@
import socket
from liteeth.test.model.etherbone import *
SRAM_BASE = 0x02000000
import socket
sock = socket.socket(socket.AF_INET, socket.SOCK_DGRAM)
# test probe
packet = EtherbonePacket()
packet.pf = 1
packet.encode()
sock.sendto(bytes(packet), ("192.168.1.40", 20000))

View File

@ -15,6 +15,9 @@ conditions = {
conditions = { conditions = {
"core_udp_tx_fsm_state" : 1 "core_udp_tx_fsm_state" : 1
} }
conditions = {
"etherbonesocdevel_master_bus_stb" : 1
}
la.configure_term(port=0, cond=conditions) la.configure_term(port=0, cond=conditions)
la.configure_sum("term") la.configure_sum("term")
# Run Logic Analyzer # Run Logic Analyzer