build/microsemi/libero_soc: associate timings constraints with synthesis/place&route/timing verification
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@ -12,9 +12,11 @@ from litex.build.generic_platform import *
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from litex.build import tools
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from litex.build.microsemi import common
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def tcl_name(name):
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return "{" + name + "}"
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def _format_io_constraint(c):
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if isinstance(c, Pins):
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return "-pin_name {} ".format(c.identifiers[0])
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@ -111,19 +113,30 @@ def _build_tcl(platform, sources, build_dir, build_name):
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if file.endswith(".init"):
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tcl.append("file copy -- {} impl/synthesis".format(file))
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# import io / fp constraints
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# import io constraints
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tcl.append("import_files -io_pdc {}".format(tcl_name(build_name + "_io.pdc")))
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# import floorplanner constraints
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tcl.append("import_files -fp_pdc {}".format(tcl_name(build_name + "_fp.pdc")))
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# import timing constraints
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tcl.append("import_files -convert_EDN_to_HDL 0 -sdc {}".format(tcl_name(build_name + ".sdc")))
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# associate constraints with tools
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tcl.append(" ".join(["organize_tool_files",
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"-tool {SYNTHESIZE}",
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"-file impl/constraint/{}.sdc".format(build_name),
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"-module {}".format(build_name),
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"-input_type {constraint}"
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]))
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tcl.append(" ".join(["organize_tool_files",
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"-tool {PLACEROUTE}",
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"-file impl/constraint/io/{}_io.pdc".format(build_name),
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"-file impl/constraint/fp/{}_fp.pdc".format(build_name),
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"-file impl/constraint/{}.sdc".format(build_name),
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"-module {}".format(build_name),
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"-input_type {constraint}"
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]))
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# import timing constraints
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tcl.append("import_files -convert_EDN_to_HDL 0 -sdc {}".format(tcl_name(build_name + ".sdc")))
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tcl.append(" ".join(["organize_tool_files",
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"-tool {VERIFYTIMING}",
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"-file impl/constraint/{}.sdc".format(build_name),
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@ -161,6 +174,7 @@ def _build_timing_sdc(vns, clocks, false_paths, build_name, additional_timing_co
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sdc += additional_timing_constraints
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tools.write_to_file(build_name + ".sdc", "\n".join(sdc))
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def _build_script(build_name, device, toolchain_path, ver=None):
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if sys.platform in ("win32", "cygwin"):
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script_ext = ".bat"
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