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litepcie/frontend/dma: group loop index and count in loop_status register (avoid 2 register reads)

This commit is contained in:
Florent Kermarrec 2015-07-24 13:52:57 +02:00
parent d73d75007e
commit 0a115f609e
3 changed files with 14 additions and 13 deletions
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20
misoclib/com/litepcie/frontend/dma/common.py
View File

@ -28,11 +28,9 @@ class DMARequestTable(Module, AutoCSR):
self._value = CSRStorage(aw+lw) self._value = CSRStorage(aw+lw)
self._we = CSR() self._we = CSR()
self._loop_prog_n = CSRStorage() self._loop_prog_n = CSRStorage()
self._index = CSRStatus(log2_int(depth)) self._loop_status = CSRStatus(32)
self._level = CSRStatus(log2_int(depth)) self._level = CSRStatus(log2_int(depth))
self._loop = CSRStatus(16)
self._flush = CSR() self._flush = CSR()
self.irq = Signal() self.irq = Signal()
# # # # # #
@ -41,8 +39,8 @@ class DMARequestTable(Module, AutoCSR):
value = self._value.storage value = self._value.storage
we = self._we.r & self._we.re we = self._we.r & self._we.re
loop_prog_n = self._loop_prog_n.storage loop_prog_n = self._loop_prog_n.storage
index = self._index.status loop_index = self._loop_status.status[:log2_int(depth)]
loop = self._loop.status loop_count = self._loop_status.status[16:]
level = self._level.status level = self._level.status
flush = self._flush.r & self._flush.re flush = self._flush.r & self._flush.re
@ -83,19 +81,19 @@ class DMARequestTable(Module, AutoCSR):
source.length.eq(fifo.dout.length) source.length.eq(fifo.dout.length)
] ]
# index # loop_index, loop_count
# used by the software for synchronization in # used by the software for synchronization in
# "loop" mode # "loop" mode
self.sync += \ self.sync += \
If(flush, If(flush,
index.eq(0), loop_index.eq(0),
loop.eq(0), loop_count.eq(0),
).Elif(source.stb & source.ack, ).Elif(source.stb & source.ack,
If(fifo.dout.start, If(fifo.dout.start,
index.eq(0), loop_index.eq(0),
loop.eq(loop+1) loop_count.eq(loop_count+1)
).Else( ).Else(
index.eq(index+1) loop_index.eq(loop_index+1)
) )
) )

3
misoclib/com/litepcie/software/linux/kernel/flags.h
View File

@ -4,4 +4,7 @@
/* dma */ /* dma */
#define DMA_LOOPBACK_ENABLE 0x1 #define DMA_LOOPBACK_ENABLE 0x1
#define DMA_TABLE_LOOP_INDEX 1 << 0
#define DMA_TABLE_LOOP_COUNT 1 << 16
#endif /* __HW_FLAGS_H */ #endif /* __HW_FLAGS_H */

4
misoclib/com/litepcie/software/linux/kernel/main.c
View File

@ -268,12 +268,12 @@ static int litepcie_dma_wait(LitePCIeState *s, struct litepcie_ioctl_dma_wait *m
for (;;) { for (;;) {
/* set current buffer */ /* set current buffer */
if (s->tx_dma_started) { if (s->tx_dma_started) {
m->tx_buf_num = litepcie_readl(s, CSR_DMA_READER_TABLE_INDEX_ADDR); m->tx_buf_num = (litepcie_readl(s, CSR_DMA_READER_TABLE_LOOP_STATUS_ADDR) & 0xffff);
} else { } else {
m->tx_buf_num = 0; m->tx_buf_num = 0;
} }
if (s->rx_dma_started) { if (s->rx_dma_started) {
m->rx_buf_num = litepcie_readl(s, CSR_DMA_WRITER_TABLE_INDEX_ADDR); m->rx_buf_num = (litepcie_readl(s, CSR_DMA_WRITER_TABLE_LOOP_STATUS_ADDR) & 0xfffff);
} else { } else {
m->rx_buf_num = 0; m->rx_buf_num = 0;
} }