Merge pull request #1948 from Liamolucko/riscv-triples

Add missing 32-bit variants of RISC-V target triples
2024-05-07 15:15:09 +02:00 · 2024-05-07 15:15:09 +02:00 · 0d3a8220dd
parent b61e8b5d42 e07c4fdb2a
commit 0d3a8220dd
1 changed files with 4 additions and 0 deletions
--- a/litex/soc/cores/cpu/init.py
+++ b/litex/soc/cores/cpu/init.py
@ -79,9 +79,13 @@ CPU_GCC_TRIPLE_RISCV64 = (
 )

 CPU_GCC_TRIPLE_RISCV32 = CPU_GCC_TRIPLE_RISCV64 + (
+    "riscv32-pc-linux-musl",
    "riscv32-unknown-elf",
    "riscv32-unknown-linux-gnu",
    "riscv32-elf",
+    "riscv32-linux",
+    "riscv32-linux-gnu",
+    "riscv32-none-elf",
    "riscv-none-embed",
    "riscv-none-elf",
 )