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Merge pull request #1948 from Liamolucko/riscv-triples 

Add missing 32-bit variants of RISC-V target triples
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enjoy-digital 2024-05-07 15:15:09 +02:00 committed by GitHub
parent b61e8b5d42 e07c4fdb2a
commit 0d3a8220dd
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4
litex/soc/cores/cpu/__init__.py
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@ -79,9 +79,13 @@ CPU_GCC_TRIPLE_RISCV64 = (
) )
CPU_GCC_TRIPLE_RISCV32 = CPU_GCC_TRIPLE_RISCV64 + ( CPU_GCC_TRIPLE_RISCV32 = CPU_GCC_TRIPLE_RISCV64 + (
"riscv32-pc-linux-musl",
"riscv32-unknown-elf", "riscv32-unknown-elf",
"riscv32-unknown-linux-gnu", "riscv32-unknown-linux-gnu",
"riscv32-elf", "riscv32-elf",
"riscv32-linux",
"riscv32-linux-gnu",
"riscv32-none-elf",
"riscv-none-embed", "riscv-none-embed",
"riscv-none-elf", "riscv-none-elf",
) )