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tools/litex_term: Add time.sleep on BridgeUART to avoid high CPU usage.
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@ -122,6 +122,7 @@ class BridgeUART:
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elif not self.rxempty.read():
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length = 1
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else:
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time.sleep(1e-3)
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continue
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r = self.bus.read(self.rxtx.addr, length=length, burst="fixed")
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for v in r:
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