Hardware/litex
1
0
Fork 0
mirror of https://github.com/enjoy-digital/litex.git synced 2025-01-04 09:52:26 -05:00
Code Issues Projects Releases Packages Wiki Activity

targets/kc705: add ddrphy to CSR map

Browse source
This commit is contained in:
Sebastien Bourdeauducq 2014-09-01 16:40:10 +08:00
parent 6decb357f1
commit 0eeb0ad9eb
1 changed files with 5 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

5
targets/kc705.py
View file

@ -62,6 +62,11 @@ class _CRG(Module):
class BaseSoC(SDRAMSoC):
default_platform = "kc705"
csr_map = {
"ddrphy": 10,
}
csr_map.update(SDRAMSoC.csr_map)
def __init__(self, platform, **kwargs):
SDRAMSoC.__init__(self, platform,
clk_freq=125*1000000, cpu_reset_address=0xaf0000,