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soc/cores/xadc: Fix refactoring issue (Zync -> Zynq :))

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This commit is contained in:
Florent Kermarrec 2023-02-13 15:43:29 +01:00
parent 931b44ecd6
commit 106b2caaec
1 changed files with 2 additions and 2 deletions
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4
litex/soc/cores/xadc.py
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@ -321,10 +321,10 @@ class USPSystemMonitor(USSystemMonitor):
analog_pads = analog_pads,
)
class ZyncUSPSystemMonitor(USSystemMonitor):
class ZynqUSPSystemMonitor(USSystemMonitor):
def __init__(self, analog_pads=None):
USSystemMonitor.__init__(self,
channels = ZyncUSPSystemMonitorChannels,
channels = ZynqUSPSystemMonitorChannels,
primitive = "SYSMONE4",
sim_device = "ZYNQ_ULTRASCALE",
analog_pads = analog_pads,