boards/platforms/genesys2: add minimum HPC connectors to be able to test SATA, add programmer parameter

This commit is contained in:
Florent Kermarrec 2018-07-18 11:51:58 +02:00
parent b19844d196
commit 10dd55fd88
1 changed files with 19 additions and 3 deletions
litex/boards/platforms

View File

@ -89,12 +89,28 @@ _io = [
]
_connectors = [
("HPC", {
"DP0_C2M_P": "Y2",
"DP0_C2M_N": "Y1",
"DP0_M2C_P": "AA4",
"DP0_M2C_N": "AA3",
"GBTCLK0_M2C_P": "L8",
"GBTCLK0_M2C_N": "L7",
}
),
]
class Platform(XilinxPlatform):
def __init__(self):
XilinxPlatform.__init__(self, "xc7k325t-ffg900-2", _io, toolchain="vivado")
def __init__(self, programmer="vivado"):
XilinxPlatform.__init__(self, "xc7k325t-ffg900-2", _io, _connectors, toolchain="vivado")
self.programmer = programmer
def create_programmer(self):
return VivadoProgrammer()
if self.programmer == "vivado":
return VivadoProgrammer()
else:
raise ValueError("{} programmer is not supported".format(programmer))
def do_finalize(self, fragment):
XilinxPlatform.do_finalize(self, fragment)