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cores/icap: add add_timing_constraints method

This commit is contained in:
Florent Kermarrec 2020-01-21 14:08:36 +01:00
parent 2074a86ee3
commit 1388088240
1 changed files with 8 additions and 0 deletions
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8
litex/soc/cores/icap.py
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@ -73,6 +73,10 @@ class ICAP(Module, AutoCSR):
) )
] ]
def add_timing_constraints(self, platform, sys_clk_freq, sys_clk):
platform.add_period_constraint(self.cd_icap.clk, 16*1e9/sys_clk_freq)
platform.add_false_path_constraints(self.cd_icap.clk, sys_clk)
class ICAPBitstream(Module, AutoCSR): class ICAPBitstream(Module, AutoCSR):
"""ICAP Bitstream """ICAP Bitstream
@ -130,3 +134,7 @@ class ICAPBitstream(Module, AutoCSR):
i_I=Cat(*[_i[8*i:8*(i+1)][::-1] for i in range(4)]), i_I=Cat(*[_i[8*i:8*(i+1)][::-1] for i in range(4)]),
) )
] ]
def add_timing_constraints(self, platform, sys_clk_freq, sys_clk):
platform.add_period_constraint(self.cd_icap.clk, 16*1e9/sys_clk_freq)
platform.add_false_path_constraints(self.cd_icap.clk, sys_clk)