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doc: remove IP

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Florent Kermarrec 2015-02-21 23:34:08 +01:00
parent 741ecca5b4
commit 15240912c9
2 changed files with 2 additions and 2 deletions
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README
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@ -21,7 +21,7 @@ can use in your FPGA and aims to provide a free, portable and flexible
alternative to vendor's solutions! alternative to vendor's solutions!
LiteScope is part of LiteX libraries whose aims are to lower entry level of complex LiteScope is part of LiteX libraries whose aims are to lower entry level of complex
FPGA IP cores by providing simple, elegant and efficient implementations of FPGA cores by providing simple, elegant and efficient implementations of
components used in today's SoC such as Ethernet, SATA, PCIe, SDRAM Controller... components used in today's SoC such as Ethernet, SATA, PCIe, SDRAM Controller...
The core uses simple and specific streaming buses and will provides in the future The core uses simple and specific streaming buses and will provides in the future

2
doc/source/docs/intro/about.rst
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@ -9,7 +9,7 @@ can use in your FPGA and aims to provide a free, portable and flexible
alternatve to vendor's solutions! alternatve to vendor's solutions!
LiteScope is part of LiteX libraries whose aims are to lower entry level of complex LiteScope is part of LiteX libraries whose aims are to lower entry level of complex
FPGA IP cores by providing simple, elegant and efficient implementations of FPGA cores by providing simple, elegant and efficient implementations of
components used in today's SoC such as Ethernet, SATA, PCIe, SDRAM Controller... components used in today's SoC such as Ethernet, SATA, PCIe, SDRAM Controller...
The core uses simple and specific streaming buses and will provides in the future The core uses simple and specific streaming buses and will provides in the future