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framebuffer/dvi: minor fixes
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parent
ea0503173d
commit
1672c4a176
3 changed files with 6 additions and 3 deletions
2
make.py
2
make.py
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@ -17,7 +17,7 @@ INST "mxcrg/wr_bufpll" LOC = "BUFPLL_X0Y2";
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INST "mxcrg/rd_bufpll" LOC = "BUFPLL_X0Y3";
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PIN "mxcrg/bufg_x1.O" CLOCK_DEDICATED_ROUTE = FALSE;
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PIN "pix2x_bufg.O" CLOCK_DEDICATED_ROUTE = FALSE;
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PIN "dviout_pix_bufg.O" CLOCK_DEDICATED_ROUTE = FALSE;
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""")
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if hasattr(soc, "fb"):
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@ -145,6 +145,9 @@ class PHY(Module):
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self.submodules.es1 = _EncoderSerializer(serdesstrobe, pads.data1_p, pads.data1_n)
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self.submodules.es2 = _EncoderSerializer(serdesstrobe, pads.data2_p, pads.data2_n)
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self.comb += [
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self.es0.d.eq(self.r),
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self.es1.d.eq(self.g),
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self.es2.d.eq(self.b),
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self.es0.c.eq(Cat(self.hsync, self.vsync)),
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self.es1.c.eq(0),
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self.es2.c.eq(0),
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@ -141,8 +141,8 @@ class _Clocking(Module, AutoCSR):
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Instance("BUFPLL", p_DIVIDE=5,
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i_PLLIN=pll_clk0, i_GCLK=ClockSignal("pix2x"), i_LOCKED=pll_locked,
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o_IOCLK=self.cd_pix10x.clk, o_LOCK=locked_async, o_SERDESSTROBE=self.serdesstrobe),
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Instance("BUFG", name="pix2x_bufg", i_I=pll_clk1, o_O=self.cd_pix2x.clk),
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Instance("BUFG", i_I=pll_clk2, o_O=self.cd_pix.clk),
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Instance("BUFG", i_I=pll_clk1, o_O=self.cd_pix2x.clk),
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Instance("BUFG", name="dviout_pix_bufg", i_I=pll_clk2, o_O=self.cd_pix.clk),
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MultiReg(locked_async, mult_locked, "sys")
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]
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