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Merge pull request #718 from trabucayre/zynq_fix_constraints 

don't add pins without pad location in constraints file
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enjoy-digital 2020-12-03 16:21:06 +01:00 committed by GitHub
parent 88023394fd b896b20e46
commit 168c5380cf
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1 changed files with 3 additions and 1 deletions
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4
litex/build/generic_platform.py
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@ -8,6 +8,7 @@
import sys import sys
import os import os
import re
from migen.fhdl.structure import Signal, Cat from migen.fhdl.structure import Signal, Cat
from migen.genlib.record import Record from migen.genlib.record import Record
@ -395,7 +396,8 @@ class GenericPlatform:
# resolve signal names in constraints # resolve signal names in constraints
sc = self.constraint_manager.get_sig_constraints() sc = self.constraint_manager.get_sig_constraints()
named_sc = [(vns.get_name(sig), pins, others, resource) named_sc = [(vns.get_name(sig), pins, others, resource)
for sig, pins, others, resource in sc] for sig, pins, others, resource in sc
if not re.match(r"^X+$", ''.join(pins))]
# resolve signal names in platform commands # resolve signal names in platform commands
pc = self.constraint_manager.get_platform_commands() pc = self.constraint_manager.get_platform_commands()
named_pc = [] named_pc = []