bus: fix CSR interconnect data readback
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@ -30,5 +30,5 @@ class Interconnect:
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comb.append(a(slave.we_i, self.master.we_o))
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comb.append(a(slave.d_i, self.master.d_o))
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rb = rb | slave.d_o
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comb.append(a(master.d_i, rb))
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comb.append(a(self.master.d_i, rb))
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return f.Fragment(comb)
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