cores/jtag/ECP5JTAG: Minor cleanup, add Gabriel to copyrights (#797).
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# Copyright (c) 2019 Florent Kermarrec <florent@enjoy-digital.fr>
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# Copyright (c) 2019 Florent Kermarrec <florent@enjoy-digital.fr>
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# Copyright (c) 2019 Antti Lukats <antti.lukats@gmail.com>
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# Copyright (c) 2019 Antti Lukats <antti.lukats@gmail.com>
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# Copyright (c) 2017 Robert Jordens <jordens@gmail.com>
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# Copyright (c) 2017 Robert Jordens <jordens@gmail.com>
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# Copyright (c) 2021 Gergory Davill <greg.davill@gmail.com>
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# Copyright (c) 2021 Gregory Davill <greg.davill@gmail.com>
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# Copyright (c) 2021 Gabriel L. Somlo <somlo@cmu.edu>
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# SPDX-License-Identifier: BSD-2-Clause
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# SPDX-License-Identifier: BSD-2-Clause
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from migen import *
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from migen import *
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@ -99,15 +100,15 @@ class ECP5JTAG(Module):
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self.tdi = Signal()
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self.tdi = Signal()
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self.tdo = Signal()
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self.tdo = Signal()
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tck = Signal()
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jce1 = Signal()
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_jce1 = Signal()
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rst_n = Signal()
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# # #
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# # #
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self.sync.jtag += _jce1.eq(jce1)
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rst_n = Signal()
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self.comb += self.capture.eq(~_jce1 & jce1) # First cycle jce1 is high we're in Capture-DR
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tck = Signal()
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jce1 = Signal()
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jce1_d = Signal()
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self.sync.jtag += jce1_d.eq(jce1)
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self.comb += self.capture.eq(jce1 & ~jce1_d) # First cycle jce1 is high we're in Capture-DR.
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self.comb += self.reset.eq(~rst_n)
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self.comb += self.reset.eq(~rst_n)
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self.specials += Instance("JTAGG",
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self.specials += Instance("JTAGG",
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@ -122,7 +123,7 @@ class ECP5JTAG(Module):
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)
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)
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# Note due to TDI being registered inside JTAGG:
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# Note due to TDI being registered inside JTAGG:
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# We delay TCK here, so TDI is valid on our local TCK edge
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# We delay TCK here, so TDI is valid on our local TCK edge.
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self.specials += MultiReg(tck, self.tck)
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self.specials += MultiReg(tck, self.tck)
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# JTAG PHY -----------------------------------------------------------------------------------------
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# JTAG PHY -----------------------------------------------------------------------------------------
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