build/lattice: add add_false_path_constraint method for API compatibility but false paths are not yet used/translated to .lpf file
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@ -152,6 +152,9 @@ class LatticeDiamondToolchain:
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special_overrides = common.lattice_ecpx_special_overrides
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special_overrides = common.lattice_ecpx_special_overrides
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def __init__(self):
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self.false_paths = set() # FIXME: use it
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def build(self, platform, fragment,
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def build(self, platform, fragment,
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build_dir = "build",
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build_dir = "build",
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build_name = "top",
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build_name = "top",
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@ -200,3 +203,9 @@ class LatticeDiamondToolchain:
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# TODO: handle differential clk
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# TODO: handle differential clk
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platform.add_platform_command("""FREQUENCY PORT "{clk}" {freq} MHz;""".format(
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platform.add_platform_command("""FREQUENCY PORT "{clk}" {freq} MHz;""".format(
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freq=str(float(1/period)*1000), clk="{clk}"), clk=clk)
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freq=str(float(1/period)*1000), clk="{clk}"), clk=clk)
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def add_false_path_constraint(self, platform, from_, to):
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from_.attr.add("keep")
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to.attr.add("keep")
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if (to, from_) not in self.false_paths:
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self.false_paths.add((from_, to))
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@ -37,3 +37,10 @@ class LatticePlatform(GenericPlatform):
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if hasattr(clk, "p"):
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if hasattr(clk, "p"):
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clk = clk.p
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clk = clk.p
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self.toolchain.add_period_constraint(self, clk, period)
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self.toolchain.add_period_constraint(self, clk, period)
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def add_false_path_constraint(self, from_, to):
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if hasattr(from_, "p"):
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from_ = from_.p
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if hasattr(to, "p"):
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to = to.p
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self.toolchain.add_false_path_constraint(self, from_, to)
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@ -173,6 +173,7 @@ class LatticeTrellisToolchain:
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def __init__(self):
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def __init__(self):
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self.yosys_template = _yosys_template
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self.yosys_template = _yosys_template
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self.build_template = _build_template
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self.build_template = _build_template
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self.false_paths = set() # FIXME: use it
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def build(self, platform, fragment,
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def build(self, platform, fragment,
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build_dir = "build",
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build_dir = "build",
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@ -231,6 +232,12 @@ class LatticeTrellisToolchain:
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platform.add_platform_command("""FREQUENCY PORT "{clk}" {freq} MHz;""".format(
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platform.add_platform_command("""FREQUENCY PORT "{clk}" {freq} MHz;""".format(
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freq=str(float(1/period)*1000), clk="{clk}"), clk=clk)
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freq=str(float(1/period)*1000), clk="{clk}"), clk=clk)
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def add_false_path_constraint(self, platform, from_, to):
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from_.attr.add("keep")
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to.attr.add("keep")
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if (to, from_) not in self.false_paths:
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self.false_paths.add((from_, to))
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def trellis_args(parser):
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def trellis_args(parser):
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parser.add_argument("--yosys-nowidelut", action="store_true",
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parser.add_argument("--yosys-nowidelut", action="store_true",
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help="pass '-nowidelut' to yosys synth_ecp5")
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help="pass '-nowidelut' to yosys synth_ecp5")
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