LiteXXX cores: use format in prints
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parent
f27e7a4b22
commit
1d4dc45436
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@ -2,9 +2,9 @@ def main(wb):
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wb.open()
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wb.open()
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regs = wb.regs
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regs = wb.regs
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###
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###
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print("sysid : 0x%04x" %regs.identifier_sysid.read())
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print("sysid : 0x{:04x}".format(regs.identifier_sysid.read()))
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print("revision : 0x%04x" %regs.identifier_revision.read())
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print("revision : 0x{:04x}".format(regs.identifier_revision.read()))
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print("frequency : %d MHz" %(regs.identifier_frequency.read()/1000000))
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print("frequency : 0x{:04x}MHz".format(regs.identifier_frequency.read()/1000000))
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SRAM_BASE = 0x02000000
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SRAM_BASE = 0x02000000
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wb.write(SRAM_BASE, [i for i in range(64)])
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wb.write(SRAM_BASE, [i for i in range(64)])
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print(wb.read(SRAM_BASE, 64))
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print(wb.read(SRAM_BASE, 64))
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@ -2,8 +2,8 @@ def main(wb):
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wb.open()
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wb.open()
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regs = wb.regs
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regs = wb.regs
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###
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###
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print("sysid : 0x%04x" %regs.identifier_sysid.read())
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print("sysid : 0x{:04x}".format(regs.identifier_sysid.read()))
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print("revision : 0x%04x" %regs.identifier_revision.read())
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print("revision : 0x{:04x}".format(regs.identifier_revision.read()))
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print("frequency : %d MHz" %(regs.identifier_frequency.read()/1000000))
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print("frequency : 0x{:04x}MHz".format(regs.identifier_frequency.read()/1000000))
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###
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###
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wb.close()
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wb.close()
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@ -2,8 +2,8 @@ def main(wb):
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wb.open()
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wb.open()
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regs = wb.regs
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regs = wb.regs
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###
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###
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print("sysid : 0x%04x" %regs.identifier_sysid.read())
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print("sysid : 0x{:04x}".format(regs.identifier_sysid.read()))
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print("revision : 0x%04x" %regs.identifier_revision.read())
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print("revision : 0x{:04x}".format(regs.identifier_revision.read()))
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print("frequency : %d MHz" %(regs.identifier_frequency.read()/1000000))
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print("frequency : 0x{:04x}MHz".format(regs.identifier_frequency.read()/1000000))
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###
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###
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wb.close()
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wb.close()
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