liteusb: more pep8 (when convenient), should be almost OK

misoclib/com/liteusb/common.py

@@ -1,3 +1,5 @@
+import random
+
 from migen.fhdl.std import *
 from migen.genlib.fsm import *
 from migen.actorlib.fifo import *
@@ -38,12 +40,10 @@ class LiteUSBTimeout(Module):
             )
         self.comb += self.done.eq(cnt == cnt_max)
 
+
 #
 # TB
 #
-import random
-
-
 def randn(max_n):
     return random.randint(0, max_n-1)
 

misoclib/com/liteusb/core/crc.py

@@ -103,6 +103,7 @@ class CRC32(Module):
     polynom = 0x04C11DB7
     init = 2**width-1
     check = 0xC704DD7B
+
     def __init__(self, dat_width):
         self.d = Signal(dat_width)
         self.value = Signal(self.width)

misoclib/com/liteusb/core/depacketizer.py

@@ -77,7 +77,9 @@ class LiteUSBDepacketizer(Module):
             source.eop.eq(eop),
             source.d.eq(sink.d),
             sink.ack.eq(source.ack),
-            If((eop & sink.stb & source.ack) | self.timeout.done, NextState("WAIT_SOP"))
+            If((eop & sink.stb & source.ack) | self.timeout.done,
+                NextState("WAIT_SOP")
+            )
         )
 
         self.sync += \
@@ -94,7 +96,8 @@ class LiteUSBDepacketizer(Module):
 #
 src_data = [
     0x5A, 0xA5, 0x5A, 0xA5, 0x01, 0x00, 0x00, 0x00, 0x04, 0x00, 0x01, 0x02, 0x03,
-    0x5A, 0xA5, 0x5A, 0xA5, 0x12, 0x00, 0x00, 0x00, 0x08, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+    0x5A, 0xA5, 0x5A, 0xA5, 0x12, 0x00, 0x00, 0x00, 0x08, 0x00, 0x01, 0x02, 0x03,
+    0x04, 0x05, 0x06, 0x07,
 ]*4