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software/bios/cmds/cmd_mem: remove debug cmds that shouldn't have been merged.

This commit is contained in:
Florent Kermarrec 2020-09-16 21:17:51 +02:00
parent 74fb086322
commit 21cc7df2fa
1 changed files with 0 additions and 94 deletions
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94
litex/soc/software/bios/cmds/cmd_mem.c
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@ -216,97 +216,3 @@ static void memspeed_handler(int nb_params, char **params)
memspeed(addr, size, read_only);
}
define_command(memspeed, memspeed_handler, "Run a memory speed test", MEM_CMDS);
#ifdef CSR_DEBUG_PRINTER
/**
* Command "csrprint"
*
* Print CSR values
*
*/
static void csrprint(int nb_params, char **params)
{
print_csrs();
}
define_command(csrprint, csrprint, "Print CSR values", MEM_CMDS);
#endif
#ifdef CSR_WB_SOFTCONTROL_BASE
static void wbr(int nb_params, char **params)
{
char *c;
unsigned int *addr;
unsigned int length;
unsigned int i;
if (nb_params < 1) {
printf("mr <address> [length]");
return;
}
addr = (unsigned int *)strtoul(params[0], &c, 0);
if (*c != 0) {
printf("Incorrect address");
return;
}
if (nb_params == 1) {
length = 4;
} else {
length = strtoul(params[1], &c, 0);
if(*c != 0) {
printf("\nIncorrect length");
return;
}
}
for (i = 0; i < length; ++i) {
wb_softcontrol_adr_write((unsigned long)(addr + i));
wb_softcontrol_read_write(1);
printf("0x%08x: 0x%08x\n", (unsigned long)(addr + i), wb_softcontrol_data_read());
}
}
define_command(wbr, wbr, "Read using softcontrol wishbone controller", MEM_CMDS);
static void wbw(int nb_params, char **params)
{
char *c;
unsigned int *addr;
unsigned int value;
unsigned int count;
unsigned int i;
if (nb_params < 2) {
printf("mw <address> <value> [count]");
return;
}
addr = (unsigned int *)strtoul(params[0], &c, 0);
if (*c != 0) {
printf("Incorrect address");
return;
}
value = strtoul(params[1], &c, 0);
if(*c != 0) {
printf("Incorrect value");
return;
}
if (nb_params == 2) {
count = 1;
} else {
count = strtoul(params[2], &c, 0);
if(*c != 0) {
printf("Incorrect count");
return;
}
}
wb_softcontrol_data_write(value);
for (i = 0; i < count; i++) {
wb_softcontrol_adr_write((unsigned long)(addr + i));
wb_softcontrol_write_write(1);
}
}
define_command(wbw, wbw, "Write using softcontrol wishbone controller", MEM_CMDS);
#endif