setup.py: Improve indentation.
This commit is contained in:
parent
b6e89c646e
commit
2318ff37d2
54
setup.py
54
setup.py
|
@ -9,25 +9,25 @@ with open("README.md", "r") as fp:
|
|||
|
||||
|
||||
setup(
|
||||
name="litex",
|
||||
version="2023.08",
|
||||
description="Python SoC/Core builder for building FPGA based systems.",
|
||||
long_description=long_description,
|
||||
long_description_content_type="text/markdown",
|
||||
author="Florent Kermarrec",
|
||||
author_email="florent@enjoy-digital.fr",
|
||||
url="http://enjoy-digital.fr",
|
||||
download_url="https://github.com/enjoy-digital/litex",
|
||||
test_suite="test",
|
||||
license="BSD",
|
||||
python_requires="~=3.6",
|
||||
install_requires=[
|
||||
name = "litex",
|
||||
version = "2023.08",
|
||||
description = "Python SoC/Core builder for building FPGA based systems.",
|
||||
long_description = long_description,
|
||||
long_description_content_type = "text/markdown",
|
||||
author = "Florent Kermarrec",
|
||||
author_email = "florent@enjoy-digital.fr",
|
||||
url = "http://enjoy-digital.fr",
|
||||
download_url = "https://github.com/enjoy-digital/litex",
|
||||
test_suite = "test",
|
||||
license = "BSD",
|
||||
python_requires = "~=3.6",
|
||||
install_requires = [
|
||||
"migen",
|
||||
"packaging",
|
||||
"pyserial",
|
||||
"requests",
|
||||
],
|
||||
extras_require={
|
||||
extras_require = {
|
||||
"develop": [
|
||||
"meson"
|
||||
"pexpect"
|
||||
|
@ -35,23 +35,23 @@ setup(
|
|||
"requests"
|
||||
]
|
||||
},
|
||||
packages=find_packages(exclude=("test*", "sim*", "doc*")),
|
||||
include_package_data=True,
|
||||
package_data={
|
||||
packages = find_packages(exclude=("test*", "sim*", "doc*")),
|
||||
include_package_data = True,
|
||||
package_data = {
|
||||
'litex.soc.doc': ['static/*']
|
||||
},
|
||||
platforms=["Any"],
|
||||
keywords="HDL ASIC FPGA hardware design",
|
||||
classifiers=[
|
||||
"Topic :: Scientific/Engineering :: Electronic Design Automation (EDA)",
|
||||
"Environment :: Console",
|
||||
"Development Status :: 3 - Alpha",
|
||||
"Intended Audience :: Developers",
|
||||
"License :: OSI Approved :: BSD License",
|
||||
"Operating System :: OS Independent",
|
||||
platforms = ["Any"],
|
||||
keywords = "HDL ASIC FPGA hardware design",
|
||||
classifiers = [
|
||||
"Topic :: Scientific/Engineering :: Electronic Design Automation (EDA)",
|
||||
"Environment :: Console",
|
||||
"Development Status :: 3 - Alpha",
|
||||
"Intended Audience :: Developers",
|
||||
"License :: OSI Approved :: BSD License",
|
||||
"Operating System :: OS Independent",
|
||||
"Programming Language :: Python",
|
||||
],
|
||||
entry_points={
|
||||
entry_points = {
|
||||
"console_scripts": [
|
||||
# Terminal/Server/Client.
|
||||
"litex_term = litex.tools.litex_term:main",
|
||||
|
|
Loading…
Reference in New Issue