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boards/targets/versaecp55g_prjtrellis: simple.py example working, specific target no longer needed 

simple.py configuration tested:
python3 simple.py --cpu-type=lm32 --gateware-toolchain=prjtrellis litex.boards.platforms.versaecp55g
python3 simple.py --cpu-type=vexriscv --gateware-toolchain=prjtrellis litex.boards.platforms.versaecp55g
This commit is contained in:
Florent Kermarrec 2018-10-29 16:02:25 +01:00
parent 1097f82283
commit 23acefb14e
1 changed files with 0 additions and 32 deletions
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litex/boards/targets/versaecp55g_prjtrellis.py
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#!/usr/bin/env python3
from migen import *
from litex.boards.platforms import versaecp55g
from litex.soc.integration.builder import *
class BaseSoC(Module):
def __init__(self, platform):
self.clock_domains.cd_sys = ClockDomain()
# crg
self.comb += self.cd_sys.clk.eq(platform.request("clk100"))
# led0 (blink)
counter = Signal(32)
self.sync += counter.eq(counter + 1)
self.comb += platform.request("user_led", 0).eq(counter[26])
# led1 (btn)
self.comb += platform.request("user_led", 1).eq(platform.request("user_dip_btn", 0))
def main():
platform = versaecp55g.Platform(toolchain="prjtrellis")
soc = BaseSoC(platform)
platform.build(soc, toolchain_path="/home/florent/dev/symbiflow/prjtrellis") # FIXME
if __name__ == "__main__":
main()