CRG: use new Module API
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@ -1,6 +1,7 @@
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from migen.fhdl.structure import *
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from migen.fhdl.module import Module
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class CRG:
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class CRG(Module):
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def get_clock_domains(self):
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r = dict()
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for k, v in self.__dict__.items():
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@ -8,9 +9,6 @@ class CRG:
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r[v.name] = v
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return r
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def get_fragment(self):
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return Fragment()
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class SimpleCRG(CRG):
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def __init__(self, platform, clk_name, rst_name):
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self.cd = ClockDomain("sys")
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