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soc/cpuif: fix CSR base generation for memories (name is already fullname)

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This commit is contained in:
Florent Kermarrec 2015-04-03 13:57:37 +02:00
parent c9c11e7aa8
commit 2583e975f0
1 changed files with 1 additions and 2 deletions
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3
misoclib/soc/cpuif.py
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@ -72,8 +72,7 @@ def get_csr_header(regions, interrupt_map):
r = "#ifndef __GENERATED_CSR_H\n#define __GENERATED_CSR_H\n#include <hw/common.h>\n" r = "#ifndef __GENERATED_CSR_H\n#define __GENERATED_CSR_H\n#include <hw/common.h>\n"
for name, origin, busword, obj in regions: for name, origin, busword, obj in regions:
if isinstance(obj, Memory): if isinstance(obj, Memory):
fullname = name + "_" + obj.name_override r += "#define CSR_"+name.upper()+"_BASE "+hex(origin)+"\n"
r += "#define CSR_"+fullname.upper()+"_BASE "+hex(origin)+"\n"
else: else:
r += "\n/* "+name+" */\n" r += "\n/* "+name+" */\n"
r += "#define CSR_"+name.upper()+"_BASE "+hex(origin)+"\n" r += "#define CSR_"+name.upper()+"_BASE "+hex(origin)+"\n"