soc_core: Increase sram size default to 8k.
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@ -75,7 +75,7 @@ class SoCCore(LiteXSoC):
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integrated_rom_size = 0,
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integrated_rom_init = [],
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# SRAM parameters
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integrated_sram_size = 0x1000,
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integrated_sram_size = 0x2000,
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integrated_sram_init = [],
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# MAIN_RAM parameters
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integrated_main_ram_size = 0,
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@ -264,8 +264,8 @@ def soc_core_args(parser):
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parser.add_argument("--integrated-rom-file", default=None, type=str,
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help="integrated (BIOS) ROM binary file")
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# SRAM parameters
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parser.add_argument("--integrated-sram-size", default=0x1000, type=auto_int,
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help="size/enable the integrated SRAM (default=4KB)")
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parser.add_argument("--integrated-sram-size", default=0x2000, type=auto_int,
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help="size/enable the integrated SRAM (default=8KB)")
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# MAIN_RAM parameters
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parser.add_argument("--integrated-main-ram-size", default=None, type=auto_int,
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help="size/enable the integrated main RAM")
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