ci: fix test_targets/test_simple
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@ -57,7 +57,6 @@ class TestTargets(unittest.TestCase):
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self.assertEqual(errors, 0)
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self.assertEqual(errors, 0)
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# lattice boards
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# lattice boards
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def test_versa_ecp5(self):
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def test_versa_ecp5(self):
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from litex.boards.targets.versa_ecp5 import BaseSoC
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from litex.boards.targets.versa_ecp5 import BaseSoC
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errors = build_test([BaseSoC(**self.kwargs)])
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errors = build_test([BaseSoC(**self.kwargs)])
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@ -85,7 +84,7 @@ class TestTargets(unittest.TestCase):
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"versa_ecp5"
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"versa_ecp5"
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]
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]
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for p in platforms:
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for p in platforms:
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os.system("litex_simple litex.boards.platforms." + p +
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os.system("litex/boards/targets/simple.py litex.boards.platforms." + p +
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" --cpu-type=vexriscv " +
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" --cpu-type=vexriscv " +
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" --no-compile-software " +
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" --no-compile-software " +
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" --no-compile-gateware " +
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" --no-compile-gateware " +
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