Merge pull request #2101 from VOGL-electronic/bios_spi_fix
bios: litespi: clear rx queue after write Beta
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2b3fd723a2
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@ -111,6 +111,9 @@ static void spiflash_master_write(uint32_t val, size_t len, size_t width, uint32
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spiflash_core_master_rxtx_write(val);
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spiflash_core_master_rxtx_write(val);
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while (!spiflash_rx_ready());
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while (!spiflash_rx_ready());
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/* Clear RX queue. */
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spiflash_core_master_rxtx_read();
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/* Clear CS. */
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/* Clear CS. */
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spiflash_core_master_cs_write(0);
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spiflash_core_master_cs_write(0);
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}
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}
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@ -153,7 +156,7 @@ static uint32_t spiflash_read_id_register(void)
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transfer_cmd(w_buf, buf, 4);
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transfer_cmd(w_buf, buf, 4);
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#ifdef SPIFLASH_DEBUG
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#ifdef SPIFLASH_DEBUG
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printf("[ID: %02x %02x %02x %02x]", buf[0], buf[1], buf[2], buf[3]);
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printf("[ID: %02x %02x %02x %02x]\n", buf[0], buf[1], buf[2], buf[3]);
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#endif
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#endif
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/* FIXME normally the status should be in buf[1],
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/* FIXME normally the status should be in buf[1],
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@ -170,7 +173,7 @@ static uint32_t spiflash_read_status_register(void)
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transfer_cmd(w_buf, buf, 4);
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transfer_cmd(w_buf, buf, 4);
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#ifdef SPIFLASH_DEBUG
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#ifdef SPIFLASH_DEBUG
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printf("[SR: %02x %02x %02x %02x]", buf[0], buf[1], buf[2], buf[3]);
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printf("[SR: %02x %02x %02x %02x]\n", buf[0], buf[1], buf[2], buf[3]);
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#endif
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#endif
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/* FIXME normally the status should be in buf[1],
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/* FIXME normally the status should be in buf[1],
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@ -97,6 +97,9 @@ static void spiram_master_write(uint32_t val, size_t len, size_t width, uint32_t
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spiram_core_master_rxtx_write(val);
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spiram_core_master_rxtx_write(val);
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while (!spiram_rx_ready());
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while (!spiram_rx_ready());
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/* Clear RX queue. */
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spiflash_core_master_rxtx_read();
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/* Clear CS. */
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/* Clear CS. */
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spiram_core_master_cs_write(0);
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spiram_core_master_cs_write(0);
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}
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}
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