software, integration/export: rename and reimplement CSR accessors
Implement CSR accessors for all standard integer types and combinations of subregister alignments (32 or 64 bit) and sizes (i.e., csr_data_width 8, 16, or 32). Rename accessors to better reflect the size of the register being accessed, and correspondingly update the generation of "csr.h" in "export.py". Additionally, provide read/write accessors that superimpose arrays of standard unsigned C types over a CSR register (which may itself be spread across multiple subregisters). Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
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63cd23c9c3
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2c39304110
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@ -136,44 +136,34 @@ def get_soc_header(constants, with_access_functions=True):
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r += "\n#endif\n"
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return r
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def _get_rw_functions_c(reg_name, reg_base, nwords, busword, alignment, read_only, with_access_functions):
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def _get_rw_functions_c(reg_name, reg_base, nwords, busword, read_only, with_access_functions):
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r = ""
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r += "#define CSR_"+reg_name.upper()+"_ADDR "+hex(reg_base)+"L\n"
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r += "#define CSR_"+reg_name.upper()+"_SIZE "+str(nwords)+"\n"
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addr_str = "CSR_{}_ADDR".format(reg_name.upper())
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size_str = "CSR_{}_SIZE".format(reg_name.upper())
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r += "#define {} {}L\n".format(addr_str, hex(reg_base))
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r += "#define {} {}\n".format(size_str, nwords)
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size = nwords*busword
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if size > 64:
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size = nwords*busword//8
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if size > 8:
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# FIXME: maybe implement some "memcpy-like" semantics for larger blobs?
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return r
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elif size > 32:
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ctype = "unsigned long long int"
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elif size > 16:
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ctype = "unsigned int"
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elif size > 8:
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ctype = "unsigned short int"
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elif size > 4:
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ctype = "uint64_t"
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elif size > 2:
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ctype = "uint32_t"
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elif size > 1:
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ctype = "uint16_t"
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else:
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ctype = "unsigned char"
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ctype = "uint8_t"
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if with_access_functions:
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r += "static inline "+ctype+" "+reg_name+"_read(void) {\n"
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if size > 1:
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r += "\t"+ctype+" r = csr_readl("+hex(reg_base)+"L);\n"
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for byte in range(1, nwords):
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r += "\tr <<= "+str(busword)+";\n\tr |= csr_readl("+hex(reg_base+alignment//8*byte)+"L);\n"
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r += "\treturn r;\n}\n"
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else:
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r += "\treturn csr_readl("+hex(reg_base)+"L);\n}\n"
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r += "static inline {} {}_read(void) {{\n".format(ctype, reg_name)
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r += "\treturn _csr_rd((unsigned long *){}, {});\n}}\n".format(addr_str, size)
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if not read_only:
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r += "static inline void "+reg_name+"_write("+ctype+" value) {\n"
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for word in range(nwords):
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shift = (nwords-word-1)*busword
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if shift:
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value_shifted = "value >> "+str(shift)
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else:
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value_shifted = "value"
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r += "\tcsr_writel("+value_shifted+", "+hex(reg_base+alignment//8*word)+"L);\n"
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r += "}\n"
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r += "static inline void {}_write({} v) {{\n".format(reg_name, ctype)
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r += "\t_csr_wr((unsigned long *){}, v, {});\n}}\n".format(addr_str, size)
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return r
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@ -186,12 +176,14 @@ def get_csr_header(regions, constants, with_access_functions=True):
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if with_access_functions:
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r += "#include <stdint.h>\n"
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r += "#ifdef CSR_ACCESSORS_DEFINED\n"
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r += "extern void csr_writeb(uint8_t value, unsigned long addr);\n"
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r += "extern uint8_t csr_readb(unsigned long addr);\n"
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r += "extern void csr_writew(uint16_t value, unsigned long addr);\n"
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r += "extern uint16_t csr_readw(unsigned long addr);\n"
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r += "extern void csr_writel(uint32_t value, unsigned long addr);\n"
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r += "extern uint32_t csr_readl(unsigned long addr);\n"
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r += "extern void csr_wr_uint8(uint8_t v, unsigned long a);\n"
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r += "extern void csr_wr_uint16(uint16_t v, unsigned long a);\n"
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r += "extern void csr_wr_uint32(uint32_t v, unsigned long a);\n"
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r += "extern void csr_wr_uint64(uint64_t v, unsigned long a);\n"
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r += "extern uint8_t csr_rd_uint8(unsigned long a);\n"
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r += "extern uint16_t csr_rd_uint16(unsigned long a);\n"
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r += "extern uint32_t csr_rd_uint32(unsigned long a);\n"
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r += "extern uint64_t csr_rd_uint64(unsigned long a);\n"
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r += "#else /* ! CSR_ACCESSORS_DEFINED */\n"
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r += "#include <hw/common.h>\n"
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r += "#endif /* ! CSR_ACCESSORS_DEFINED */\n"
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@ -202,7 +194,7 @@ def get_csr_header(regions, constants, with_access_functions=True):
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if not isinstance(region.obj, Memory):
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for csr in region.obj:
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nr = (csr.size + region.busword - 1)//region.busword
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r += _get_rw_functions_c(name + "_" + csr.name, origin, nr, region.busword, alignment,
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r += _get_rw_functions_c(name + "_" + csr.name, origin, nr, region.busword,
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isinstance(csr, CSRStatus), with_access_functions)
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origin += alignment//8*nr
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if hasattr(csr, "fields"):
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@ -4,8 +4,8 @@
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#include <stdint.h>
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/* To overwrite CSR accessors, define extern, non-inlined versions
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* of csr_read[bwl]() and csr_write[bwl](), and define
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* CSR_ACCESSORS_DEFINED.
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* of csr_rd_uint[8|16|32|64]() and csr_wr_uint[8|16|32|64](), and
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* define CSR_ACCESSORS_DEFINED.
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*/
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#ifndef CSR_ACCESSORS_DEFINED
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@ -14,37 +14,232 @@
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#ifdef __ASSEMBLER__
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#define MMPTR(x) x
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#else /* ! __ASSEMBLER__ */
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#define MMPTR(x) (*((volatile unsigned long *)(x)))
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static inline void csr_writeb(uint8_t value, unsigned long addr)
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/* CSRs are stored in subregister slices of CONFIG_CSR_DATA_WIDTH (native
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* endianness), with the least significant slice at the lowest aligned
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* (base) address. */
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#include <generated/soc.h>
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#if !defined(CONFIG_CSR_ALIGNMENT) || !defined(CONFIG_CSR_DATA_WIDTH)
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#error csr alignment and data-width MUST be set before including this file!
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#endif
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#if CONFIG_CSR_DATA_WIDTH > CONFIG_CSR_ALIGNMENT
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#error invalid CONFIG_CSR_DATA_WIDTH (must not exceed CONFIG_CSR_ALIGNMENT)!
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#endif
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/* FIXME: preprocessor can't evaluate 'sizeof()' operator, is there a better
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* way to implement the following assertion?
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* #if sizeof(unsigned long) != CONFIG_CSR_ALIGNMENT/8
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* #error invalid CONFIG_CSR_ALIGNMENT (must match native CPU word size)!
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* #endif
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*/
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/* CSR data width (subregister width) in bytes, for direct comparson to sizeof() */
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#define CSR_DW_BYTES (CONFIG_CSR_DATA_WIDTH/8)
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/* CSR subregisters are embedded inside native CPU word aligned locations: */
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#define MMPTR(a) (*((volatile unsigned long *)(a)))
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/* Number of subregs required for various total byte sizes, by subreg width:
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* NOTE: 1, 2, 4, and 8 bytes represent uint[8|16|32|64]_t C types; However,
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* CSRs of intermediate byte sizes (24, 40, 48, and 56) are NOT padded
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* (with extra unallocated subregisters) to the next valid C type!
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* +-----+-----------------+
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* | csr | bytes |
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* | _dw | 1 2 3 4 5 6 7 8 |
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* | |-----=---=-=-=---|
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* | 1 | 1 2 3 4 5 6 7 8 |
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* | 2 | 1 1 2 2 3 3 4 4 |
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* | 4 | 1 1 1 1 2 2 2 2 |
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* | 8 | 1 1 1 1 1 1 1 1 |
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* +-----+-----------------+ */
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static inline int num_subregs(int csr_bytes)
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{
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*((volatile uint8_t *)addr) = value;
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return (csr_bytes - 1) / CSR_DW_BYTES + 1;
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}
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static inline uint8_t csr_readb(unsigned long addr)
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/* Read a CSR of size 'csr_bytes' located at address 'a'. */
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static inline uint64_t _csr_rd(unsigned long *a, int csr_bytes)
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{
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return *(volatile uint8_t *)addr;
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uint64_t r = a[0];
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for (int i = 1; i < num_subregs(csr_bytes); i++) {
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r <<= CONFIG_CSR_DATA_WIDTH;
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r |= a[i];
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}
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return r;
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}
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static inline void csr_writew(uint16_t value, unsigned long addr)
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/* Write value 'v' to a CSR of size 'csr_bytes' located at address 'a'. */
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static inline void _csr_wr(unsigned long *a, uint64_t v, int csr_bytes)
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{
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*((volatile uint16_t *)addr) = value;
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int ns = num_subregs(csr_bytes);
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for (int i = 0; i < ns; i++)
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a[i] = v >> (CONFIG_CSR_DATA_WIDTH * (ns - 1 - i));
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}
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static inline uint16_t csr_readw(unsigned long addr)
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// FIXME: - should we provide 24, 40, 48, and 56 bit csr_[rd|wr] methods?
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static inline uint8_t csr_rd_uint8(unsigned long a)
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{
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return *(volatile uint16_t *)addr;
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return _csr_rd((unsigned long *)a, sizeof(uint8_t));
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}
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static inline void csr_writel(uint32_t value, unsigned long addr)
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static inline void csr_wr_uint8(uint8_t v, unsigned long a)
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{
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*((volatile uint32_t *)addr) = value;
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_csr_wr((unsigned long *)a, v, sizeof(uint8_t));
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}
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static inline uint32_t csr_readl(unsigned long addr)
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static inline uint16_t csr_rd_uint16(unsigned long a)
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{
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return *(volatile uint32_t *)addr;
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return _csr_rd((unsigned long *)a, sizeof(uint16_t));
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}
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static inline void csr_wr_uint16(uint16_t v, unsigned long a)
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{
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_csr_wr((unsigned long *)a, v, sizeof(uint16_t));
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}
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static inline uint32_t csr_rd_uint32(unsigned long a)
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{
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return _csr_rd((unsigned long *)a, sizeof(uint32_t));
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}
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static inline void csr_wr_uint32(uint32_t v, unsigned long a)
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{
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_csr_wr((unsigned long *)a, v, sizeof(uint32_t));
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}
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static inline uint64_t csr_rd_uint64(unsigned long a)
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{
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return _csr_rd((unsigned long *)a, sizeof(uint64_t));
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}
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static inline void csr_wr_uint64(uint64_t v, unsigned long a)
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{
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_csr_wr((unsigned long *)a, v, sizeof(uint64_t));
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}
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/* Read a CSR located at address 'a' into an array 'buf' of 'cnt' elements.
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*
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* NOTE: Since CSR_DW_BYTES is a constant here, we might be tempted to further
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* optimize things by leaving out one or the other of the if() branches below,
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* depending on each unsigned type width;
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* However, this code is also meant to serve as a reference for how CSRs are
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* to be manipulated by other programs (e.g., an OS kernel), which may benefit
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* from dynamically handling multiple possible CSR subregister data widths
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* (e.g., by passing a value in through the Device Tree).
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* Ultimately, if CSR_DW_BYTES is indeed a constant, the compiler should be
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* able to determine on its own whether it can automatically optimize away one
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* of the if() branches! */
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#define _csr_rd_buf(a, buf, cnt) \
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{ \
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int i, j, nsubs, n_sub_elem; \
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unsigned long *addr = (unsigned long *)(a); \
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uint64_t r; \
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if (sizeof(buf[0]) >= CSR_DW_BYTES) { \
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/* one or more subregisters per element */ \
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for (i = 0; i < cnt; i++) { \
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buf[i] = _csr_rd(addr, sizeof(buf[0])); \
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addr += num_subregs(sizeof(buf[0])); \
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} \
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} else { \
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/* multiple elements per subregister (2, 4, or 8) */ \
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nsubs = num_subregs(sizeof(buf[0]) * cnt); \
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n_sub_elem = CSR_DW_BYTES / sizeof(buf[0]); \
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for (i = 0; i < nsubs; i++) { \
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r = addr[i]; \
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for (j = n_sub_elem - 1; j >= 0; j--) { \
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if (i * n_sub_elem + j < cnt) \
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buf[i * n_sub_elem + j] = r; \
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r >>= sizeof(buf[0]) * 8; \
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} \
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} \
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} \
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}
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/* Write an array 'buf' of 'cnt' elements to a CSR located at address 'a'.
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*
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* NOTE: The same optimization considerations apply here as with _csr_rd_buf()
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* above.
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*/
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#define _csr_wr_buf(a, buf, cnt) \
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{ \
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int i, j, nsubs, n_sub_elem; \
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unsigned long *addr = (unsigned long *)(a); \
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uint64_t v; \
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if (sizeof(buf[0]) >= CSR_DW_BYTES) { \
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/* one or more subregisters per element */ \
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for (i = 0; i < cnt; i++) { \
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_csr_wr(addr, buf[i], sizeof(buf[0])); \
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addr += num_subregs(sizeof(buf[0])); \
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} \
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} else { \
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/* multiple elements per subregister (2, 4, or 8) */ \
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nsubs = num_subregs(sizeof(buf[0]) * cnt); \
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n_sub_elem = CSR_DW_BYTES / sizeof(buf[0]); \
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for (i = 0; i < nsubs; i++) { \
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v = buf[i * n_sub_elem + 0]; \
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for (j = 1; j < n_sub_elem; j++) { \
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if (i * n_sub_elem + j == cnt) \
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break; \
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v <<= sizeof(buf[0]) * 8; \
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v |= buf[i * n_sub_elem + j]; \
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} \
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addr[i] = v; \
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} \
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} \
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}
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static inline void csr_rd_buf_uint8(unsigned long a, uint8_t *buf, int cnt)
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{
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_csr_rd_buf(a, buf, cnt);
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}
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static inline void csr_wr_buf_uint8(unsigned long a,
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const uint8_t *buf, int cnt)
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{
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_csr_wr_buf(a, buf, cnt);
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}
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static inline void csr_rd_buf_uint16(unsigned long a, uint16_t *buf, int cnt)
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{
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_csr_rd_buf(a, buf, cnt);
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}
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static inline void csr_wr_buf_uint16(unsigned long a,
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const uint16_t *buf, int cnt)
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{
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_csr_wr_buf(a, buf, cnt);
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}
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static inline void csr_rd_buf_uint32(unsigned long a, uint32_t *buf, int cnt)
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{
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_csr_rd_buf(a, buf, cnt);
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}
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static inline void csr_wr_buf_uint32(unsigned long a,
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const uint32_t *buf, int cnt)
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{
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_csr_wr_buf(a, buf, cnt);
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}
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/* NOTE: the macros' "else" branch is unreachable, no need to be warned
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* about a >= 64bit left shift! */
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#pragma GCC diagnostic push
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#pragma GCC diagnostic ignored "-Wshift-count-overflow"
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static inline void csr_rd_buf_uint64(unsigned long a, uint64_t *buf, int cnt)
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{
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_csr_rd_buf(a, buf, cnt);
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}
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static inline void csr_wr_buf_uint64(unsigned long a,
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const uint64_t *buf, int cnt)
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{
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_csr_wr_buf(a, buf, cnt);
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}
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#pragma GCC diagnostic pop
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#endif /* ! __ASSEMBLER__ */
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#endif /* ! CSR_ACCESSORS_DEFINED */
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